參數(shù)資料
型號(hào): DK-DEV-4SGX230N
廠商: Altera
文件頁數(shù): 60/82頁
文件大?。?/td> 0K
描述: KIT DEVELOPMENT STRATIX IV
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
特色產(chǎn)品: Stratix? IV GX FPGA Development Kit
標(biāo)準(zhǔn)包裝: 1
系列: Stratix® IV GX
類型: FPGA
適用于相關(guān)產(chǎn)品: EP4SGX230K
所含物品: 開發(fā)板、通用電源、纜線和軟件
產(chǎn)品目錄頁面: 607 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: EP4SGX230KF40C3N-ND - IC STRATIX IV FPGA 230K 1517FBGA
EP4SGX230KF40C3-ND - IC STRATIX IV FPGA 230K 1517FBGA
EP4SGX230HF35C3N-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230HF35C3-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230FF35C3NES-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230FF35C3ES-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230DF29C3NES-ND - IC STRATIX IV GX 230K 780-FBGA
EP4SGX230DF29C3ES-ND - IC STRATIX IV GX 230K 780-FBGA
其它名稱: 544-2594
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–55
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Transmitter
True Differential I/O
Standards - fHSDR
(data rate)
SERDES factor J = 3 to 10
1600
—1250
1250
Mbps
SERDES factor J = 2,
Uses DDR Registers
Mbps
SERDES factor J = 1,
Uses an SDR Register
Mbps
Emulated
Differential I/O
Standards with
Three External
Output Resistor
Networks - fHSDR
(data rate) (7)
SERDES factor J = 4 to 10
1250
—1152
800
Mbps
Emulated
Differential I/O
Standards with One
External Output
Resistor - fHSDR
(data rate)
—311
200
200
Mbps
tx Jitter - True
Differential I/O
Standards
Total Jitter for Data Rate,
600 Mbps to 1.6 Gbps
160
160
160
ps
Total Jitter for Data Rate,
< 600 Mbps
0.1
0.1
0.1
UI
tx Jitter - Emulated
Differential I/O
Standards with
Three External
Output Resistor
Network
Total Jitter for Data Rate,
600 Mbps to 1.25 Gbps
300
300
325
ps
Total Jitter for Data Rate
< 600 Mbps
——
0.2
——
0.2
——
0.25
UI
tx Jitter - Emulated
Differential I/O
Standards with One
External Output
Resistor Network
0.125
0.15
0.15
UI
tDUTY
Tx output clock duty cycle for
both True and Emulated
Differential I/O Standards
45
50
55
45
50
55
45
50
55
%
tRISE & tFALL
True Differential I/O Standards
160
200
200
ps
Emulated Differential I/O
Standards with Three External
Output Resistor Networks
250
250
300
ps
Emulated Differential I/O
Standards with One External
Output Resistor
460
500
500
ps
Table 1–42. High-Speed I/O Specifications (1), (2) (Part 2 of 3)
Symbol
Conditions
–2/–2× Speed Grade
–3 Speed Grade
–4 Speed Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
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