參數(shù)資料
型號: DK-DEV-4SGX230N
廠商: Altera
文件頁數(shù): 73/82頁
文件大?。?/td> 0K
描述: KIT DEVELOPMENT STRATIX IV
產品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
特色產品: Stratix? IV GX FPGA Development Kit
標準包裝: 1
系列: Stratix® IV GX
類型: FPGA
適用于相關產品: EP4SGX230K
所含物品: 開發(fā)板、通用電源、纜線和軟件
產品目錄頁面: 607 (CN2011-ZH PDF)
相關產品: EP4SGX230KF40C3N-ND - IC STRATIX IV FPGA 230K 1517FBGA
EP4SGX230KF40C3-ND - IC STRATIX IV FPGA 230K 1517FBGA
EP4SGX230HF35C3N-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230HF35C3-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230FF35C3NES-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230FF35C3ES-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230DF29C3NES-ND - IC STRATIX IV GX 230K 780-FBGA
EP4SGX230DF29C3ES-ND - IC STRATIX IV GX 230K 780-FBGA
其它名稱: 544-2594
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–67
Glossary
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Document Revision History
Table 1–55 lists the revision history for this chapter.
V
VCM(DC)
DC Common mode input voltage.
VICM
Input Common mode voltage—The common mode of the differential signal at the receiver.
VID
Input differential voltage swing—The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
VDIF(AC)
AC differential input voltage—Minimum AC input differential voltage required for switching.
VDIF(DC)
DC differential input voltage— Minimum DC input differential voltage required for switching.
VIH
Voltage input high—The minimum positive voltage applied to the input which is accepted by
the device as a logic high.
VIH(AC)
High-level AC input voltage
VIH(DC)
High-level DC input voltage
VIL
Voltage input low—The maximum positive voltage applied to the input which is accepted by
the device as a logic low.
VIL(AC)
Low-level AC input voltage
VIL(DC)
Low-level DC input voltage
VOCM
Output Common mode voltage—The common mode of the differential signal at the
transmitter.
VOD
Output differential voltage swing—The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter.
VSWING
Differential input voltage
VX
Input differential cross point voltage
VOX
Output differential cross point voltage
W
W
High-speed I/O block: Clock Boost Factor
X, Y, Z
——
Table 1–54. Glossary Table (Part 4 of 4)
Letter
Subject
Definitions
Table 1–55. Document Revision History (Part 1 of 3)
Date
Version
Changes
March 2014
5.8
Added note to Table 1–49.
Updated D6 row in Table 1–52.
January 2014
5.7
Updated Table 1–42.
December 2013
5.6
Updated Table 1–23 and Table 1–24.
November 2013
5.5
Updated Table 1–23 and Table 1–24.
November 2013
5.4
Updated Table 1–42, Table 1–23, and Table 1–24.
July 2012
5.3
Added Table 1–5 and Table 1–40.
Updated Table 1–15, Table 1–22, Table 1–23, Table 1–30, Table 1–33, Table 1–35,
Table 1–36, Table 1–39, Table 1–42 and Table 1–51.
Removed “Schmitt Trigger Input” section.
December 2011
5.2
Added Figure 1–7.
Updated Table 1–22 and Table 1–41.
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