參數(shù)資料
型號(hào): DK-DEV-4SGX230N
廠商: Altera
文件頁(yè)數(shù): 79/82頁(yè)
文件大?。?/td> 0K
描述: KIT DEVELOPMENT STRATIX IV
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
特色產(chǎn)品: Stratix? IV GX FPGA Development Kit
標(biāo)準(zhǔn)包裝: 1
系列: Stratix® IV GX
類型: FPGA
適用于相關(guān)產(chǎn)品: EP4SGX230K
所含物品: 開發(fā)板、通用電源、纜線和軟件
產(chǎn)品目錄頁(yè)面: 607 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: EP4SGX230KF40C3N-ND - IC STRATIX IV FPGA 230K 1517FBGA
EP4SGX230KF40C3-ND - IC STRATIX IV FPGA 230K 1517FBGA
EP4SGX230HF35C3N-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230HF35C3-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230FF35C3NES-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230FF35C3ES-ND - IC STRATIX IV GX 230K 1152-FBGA
EP4SGX230DF29C3NES-ND - IC STRATIX IV GX 230K 780-FBGA
EP4SGX230DF29C3ES-ND - IC STRATIX IV GX 230K 780-FBGA
其它名稱: 544-2594
2–2
Chapter 2: Addendum to the Stratix IV Device Handbook
Stratix IV Device Handbook
February 2011
Altera Corporation
Volume 4: Device Datasheet and Addendum
Document Revision History
Table 2–1 lists the revision history for this chapter.
Table 2–1. Document Revision History
Date
Version
Changes
February 2011
1.5
Moved the “Adaptive Equalization (AEQ)” sections to the Dynamic Reconfiguration in
Minor text edits.
September 2010
1.4
Added new information for the Decision Feedback Equalization (DFE) feature.
April 2010
1.3
March 2010
1.2
Moved the “Power-On Reset Circuitry”, “Power-On Reset Specifications”, “Correct
Power-Up Sequence for Production Devices”, and “Correct Power-Up Sequence for
Production Devices” sections to the Hot Socketing and Power-On Reset in Stratix IV
Devices chapter.
Moved the “Power-On Reset Circuit” and “JTAG TMS and TDI Pin Pull-Up Resistor Value
Specification” sections to the Configuration, Design Security, Remote System Upgrades
with Stratix IV Devices chapter.
Moved the “Summary of OCT Assignments” section to the I/O Features in Stratix IV
Devices chapter.
February 2010
1.1
Added the “Power-On Reset Circuitry”, “Power-On Reset Specifications”, “Correction to
POR Signal Pulse Width Delay Times”, “Correct Power-Up Sequence for Production
Devices”, “Power-On Reset Circuit”, “Summary of OCT Assignments”, and “JTAG TMS
and TDI Pin Pull-Up Resistor Value Specification” sections.
Minor text edits.
November 2009
1.0
Stratix IV GX enhanced transceiver data rate specifications in
–4 commercial speed grade.
Initial release.
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參數(shù)描述
DK-DEV-4SGX230N/C2 功能描述:EP4SGX230KF40C2N Stratix? IV GX FPGA Evaluation Board 制造商:altera 系列:Stratix? IV GX 零件狀態(tài):過(guò)期 類型:FPGA 配套使用產(chǎn)品/相關(guān)產(chǎn)品:EP4SGX230KF40C2N 內(nèi)容:板,線纜,電源 標(biāo)準(zhǔn)包裝:1
DK-DEV-4SGX530N 功能描述:可編程邏輯 IC 開發(fā)工具 FPGA Development Kit For EP4SGX530 RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評(píng)估:5CEFA7F3 接口類型: 工作電源電壓:
DK-DEV-5AGTD7N 功能描述:可編程邏輯 IC 開發(fā)工具 FPGA Development Kit For 5AGTD7K3F40I3N RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評(píng)估:5CEFA7F3 接口類型: 工作電源電壓:
DK-DEV-5AGXB3N/ES 功能描述:可編程邏輯 IC 開發(fā)工具 FPGA Development Kit For 5AGXFB3H6F ES RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評(píng)估:5CEFA7F3 接口類型: 工作電源電壓:
DK-DEV-5ASTD5N 功能描述:KIT DEV ARRIA V FPGA 制造商:altera 系列:Arria V ST 零件狀態(tài):在售 類型:FPGA 配套使用產(chǎn)品/相關(guān)產(chǎn)品:Arria? V ST 內(nèi)容:板 標(biāo)準(zhǔn)包裝:1