參數(shù)資料
型號: DS3112+
廠商: Maxim Integrated Products
文件頁數(shù): 89/133頁
文件大?。?/td> 0K
描述: IC MUX TEMPE T3/E3 256-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 40
控制器類型: 調(diào)幀器,多路復(fù)用器
接口: 并行/串行
電源電壓: 3.135 V ~ 3.465 V
電流 - 電源: 150mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-PBGA(27x27)
包裝: 管件
產(chǎn)品目錄頁面: 1419 (CN2011-ZH PDF)
DS3112
59 of 133
5.6 T3/E3 Performance Error Counters
There are six error counters in the DS3112. All of the errors counters are 16 bits in length. The host has
three options as to how these errors counters are updated. The device can be configured to automatically
update the counters once a second or manually via either an internal software bit (MECU) or an external
signal (FRMECU). See Section 4.2 for details. All the error counters saturate when full and will not
rollover.
Register Name:
BPVCR
Register Description:
BiPolar Violation Count Register
Register Address:
20h
Bit #
7
6
5
4
3
2
1
0
Name
BPV7
BPV6
BPV5
BPV4
BPV3
BPV2
BPV1
BPV0
Default
Bit #
15
14
13
12
11
10
9
8
Name
BPV15
BPV14
BPV13
BPV12
BPV11
BPV10
BPV9
BPV8
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15: 16-Bit BiPolar Violation Counter (BPV0 to BPV15). These bits report the number of BiPolar
Violations (BPV). In the E3 Mode, this counter can also be configured via the E3CVE bit in the T3E3 Control
Register (Section 5.2) to count Code Violations (CV). A BPV is defined as consecutive pulses (or marks) of the
same polarity that are not part of a B3ZS/HDB3 codeword. A CV is defined in ITU O.161 as consecutive BPVs of
the same polarity.
Register Name:
EXZCR
Register Description:
EXcessive Zero Count Register
Register Address:
22h
Bit #
7
6
5
4
3
2
1
0
Name
EXZ7
EXZ6
EXZ5
EXZ4
EXZ3
EXZ2
EXZ1
EXZ0
Default
Bit #
15
14
13
12
11
10
9
8
Name
EXZ15
EXZ14
EXZ13
EXZ12
EXZ11
EXZ10
EXZ9
EXZ8
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15: 16-Bit EXcessive Zero Counter (EXZ0 to EXZ15). These bits report the number of EXcessive Zero
occurrences (EXZ). An EXZ occurrence is defined as three or more consecutive zeros in the T3 mode and four or
more consecutive zeros in the E3 mode. As an example, a string of eight consecutive zeros would only increment
this counter once.
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