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參數(shù)資料
| 型號： | DS3134 |
| 英文描述： | Chateau Channelized T1 And E1 And HDLC Controller |
| 中文描述： | 不推薦用于新設(shè)計 |
| 文件頁數(shù)： | 25/203頁 |
| 文件大?。?/td> | 777K |
| 代理商： | DS3134 |
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DS3134
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Signal Name:
Signal Description:
Signal Type:
In the PCI Bridge Mode (LMS = 0), these signals are outputs that will be asserted on the rising edge of
LCLK to indicate which address to be written to or read from. These signals will be tri-stated when the
Local Bus is not currently involved in a bus transaction and driven when a bus transaction is active. In the
Configuration Mode (LMS = 1), these signals are inputs and only the bottom 16 (LA[15:0]) are active, the
upper four (LA[19:16]) are ignored and should be tied low. These signals will be sampled on the rising
edge of LCLK to determine the internal device configuration register that the external host wishes to
access.
LA0 to LA19
Local Bus Non-Multiplexed Address Bus
Input / Output (tri-state capable)
Signal Name:
Signal Description:
Signal Type:
In the PCI Bridge Mode (LMS = 0), this output signal is asserted on the rising edge of LCLK. In Intel
Mode (LIM = 0) it will be asserted when data is to be written to the Local Bus. In Motorola Mode (LIM
= 1), this signal will determine whether a read or write is to occur. If bus arbitration is enabled via the
Local Bus Arbitration (LARBE) control bit in the Local Bus Bridge Mode Control Register (LBBMC),
then this signal will be tri-stated when the Local Bus is not currently involved in a bus transaction and
driven when a bus transaction is active. When bus arbitration is disabled, this signal is always driven. In
the Configuration Mode (LMS = 1), this signal is sampled on the rising edge of LCLK. In Intel Mode
(LIM = 0) it will determine when data is to be written to the device. In Motorola Mode (LIM = 1), this
signal will be used to determine whether a read or write is to occur.
LWR* (LR/W*)
Local Bus Write Enable (Local Bus Read/Write Select)
Input / Output (tri-state capable)
Signal Name:
Signal Description:
Signal Type:
In the PCI Bridge Mode (LMS = 0), this active low output signal is asserted on the rising edge of LCLK.
In Intel Mode (LIM = 0) it will be asserted when data is to be read from the Local Bus. In Motorola Mode
(LIM = 1), the rising edge will be used to write data into the slave device. If bus arbitration is enabled via
the Local Bus Arbitration (LARBE) control bit in the Local Bus Bridge Mode Control Register
(LBBMC), then this signal will be tri-stated when the Local Bus is not currently involved in a bus
transaction and driven when a bus transaction is active. When bus arbitration is disabled, this signal is
always driven. In the Configuration Mode (LMS = 1), this signal is an active low input which is sampled
on the rising edge of LCLK. In Intel Mode (LIM = 0) it will determine when data is to be read from the
device. In Motorola Mode (LIM = 1), the rising edge will be used to write data into the device.
LRD* (LDS*)
Local Bus Read Enable (Local Bus Data Strobe)
Input / Output (tri-state capable)
Signal Name:
Signal Description:
Signal Type:
In the PCI Bridge Mode (LMS = 0), this active low signal is an input which sampled on the rising edge of
LCLK. If asserted and unmasked, this signal will cause an interrupt at the PCI bus via the PINTA*
signal. If not used in the PCI Bridge Mode, this signal should be tied high. In the Configuration Mode
(LMS = 1) this signal is an open drain output which will be forced low if one or more unmasked interrupt
sources within the device is active. The signal will remain low until the interrupt is either serviced or
masked.
LINT*
Local Bus Interrupt
Input / Output (open drain)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS-313PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Miscellaneous |
| DS-313-PIN | 功能描述:信號調(diào)節(jié) RoHS:否 制造商:EPCOS 產(chǎn)品:Duplexers 頻率:782 MHz, 751 MHz 頻率范圍: 電壓額定值: 帶寬: 阻抗:50 Ohms 端接類型:SMD/SMT 封裝 / 箱體:2.5 mm x 2 mm 工作溫度范圍:- 30 C to + 85 C 封裝:Reel |
| DS31400 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter |
| DS31400DK | 功能描述:時鐘和定時器開發(fā)工具 DS31400 Dev Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| DS31400GN | 功能描述:計時器和支持產(chǎn)品 Not Available From Mouser RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
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