參數(shù)資料
型號(hào): DS32512DK
廠商: Maxim Integrated Products
文件頁數(shù): 72/130頁
文件大?。?/td> 0K
描述: KIT DEMO FOR DS32512
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
設(shè)計(jì)資源: DS32512 Gerber Files
標(biāo)準(zhǔn)包裝: 1
主要目的: 電信,線路接口單元(LIU)
已用 IC / 零件: DS32512
DS32506/DS32508/DS32512
46 of 130
Figure 8-11. SPI Bus Transactions
R/
W Register Address Burst
Data Byte
SDI
CS
SDO
Single-Byte Write
Single-Byte Read
R/
W Register Address Burst
Data Byte
R/
W Register Address Burst Data Byte 1
Burst Write
SDI
CS
SDO
SDI
CS
SDO
0 (Write)
0 (single-byte)
1 (Read)
0 (single-byte)
0 (Write)
1 (burst)
Data Byte N
R/
W Register Address Burst
Data Byte 1
Burst Read
SDI
CS
1 (Read)
1 (burst)
Data Byte N
SDO
8.10 Interrupt Structure
The interrupt structure is designed to efficiently guide the user to the source of an interrupt. The status bits in the
global interrupt status register (GLOBAL.ISR) are read to determine if the interrupt source comes from a global
event, such as a one-second timer interrupt, or one of the ports. If the interrupt source is a global event, the global
status register is read (GLOBAL.SRL) to determine the source. If the interrupt source is a port, the port interrupt
status register (PORT.ISR) is read to determine if the interrupt source comes from a port event, such as a
performance monitor update interrupt, or one of the functional blocks inside the port. If the interrupt source is a port
event, the port status register is read (PORT.SRL) to determine the source. If the interrupt source is from a
functional block inside the port, the associated block's status register is read to determine the source. The source
of an interrupt can be determined by reading no more than three 16-bit registers.
Once the interrupt source has been determined, the interrupt can be cleared by either reading or writing the latched
status register (see Section 8.8.5). An alternate method for clearing an interrupt is to disable the interrupt at the bit,
block, port, or global level by writing a zero to the associated interrupt enable bit. Note: Disabling the interrupt at
the block, port, or global level disables all interrupts sources at or below that level.
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DS3253DK KIT DEMO FOR DS3253
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