參數(shù)資料
型號(hào): EPF10K100EQI208-2
廠商: Altera
文件頁(yè)數(shù): 50/100頁(yè)
文件大?。?/td> 0K
描述: IC FLEX 10K FPGA 100K 208-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 72
系列: FLEX-10KE®
LAB/CLB數(shù): 624
邏輯元件/單元數(shù): 4992
RAM 位總計(jì): 49152
輸入/輸出數(shù): 147
門數(shù): 257000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
Altera Corporation
53
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Timing simulation and delay prediction are available with the Altera
Simulator and Timing Analyzer, or with industry-standard EDA tools.
The Simulator offers both pre-synthesis functional simulation to evaluate
logic design accuracy and post-synthesis timing simulation with 0.1-ns
resolution. The Timing Analyzer provides point-to-point timing delay
information, setup and hold time analysis, and device-wide performance
analysis.
Figure 24 shows the overall timing model, which maps the possible paths
to and from the various elements of the FLEX 10KE device.
Figure 24. FLEX 10KE Device Timing Model
Figures 25 through 28 show the delays that correspond to various paths
and functions within the LE, IOE, EAB, and bidirectional timing models.
Dedicated
Clock/Input
Interconnect
I/O Element
Logic
Element
Embedded Array
Block
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