參數(shù)資料
型號： EVAL-ADUC7036QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 107/132頁
文件大小： 0K
描述： BOARD EVAL FOR ADUC7036
設(shè)計資源： EVAL-ADUC7036 Schematic & Brd Outline
EVAL ADUC7036 Gerber Files
標準包裝： 1
系列： QuickStart™ PLUS 套件
主要目的： 電源管理，電池監(jiān)控器
嵌入式： 是，MCU，16/32 位
已用 IC / 零件： ADuC7036
已供物品： 板，線纜，文檔，仿真器，電源，軟件
ADuC7036
Rev. C | Page 76 of 132
TIMER1—GENERAL-PURPOSE TIMER
Timer1 is a general-purpose, 32-bit up/down counter with
a programmable prescaler. The prescaler source can be the low
power 32.768 kHz oscillator, the core clock, or from one of two
external GPIOs. This source can be scaled by a factor of 1, 16,
256, or 32,768. When the core is operating at 20.48 MHz and at
CD = 0 with a prescaler of 1 (ignoring the external GPIOs), a min-
imum resolution of 48.83 ns results.
The counter can be formatted as a standard 32-bit value or as
time expressed as hours:minutes:seconds:hundredths.
Timer1 has a capture register (T1CAP) that is triggered by the
initial assertion of a selected IRQ source. When the capture
register is triggered, the current timer value is copied to T1CAP,
and the timer continues to run. This feature can be used to
determine the assertion of an event with increased accuracy.
The Timer1 interface consists of five MMRS: T1LD, T1VAL,
T1CAP, T1CLRI, and T1CON. T1LD, T1VAL, and T1CAP are
32-bit registers that hold 32-bit unsigned integers. T1VAL and
T1CAP are read only. T1CLRI is an 8-bit register. Writing any
value to this register clears the Timer1 interrupt. T1CON is a
configuration MMR and is described in Table 54.
Timer1 features a postscaler that allows the user to count the
number of Timer1 timeouts between 1 and 256. To activate the
postscaler, the user sets Bit 23 and writes the desired number to
count into Bits[24:31] of T1CON. When that number of timeouts
is reached, Timer1 generates an interrupt if T1CON[18] is set.
Note that if the part is in a low power mode and Timer1 is clocked
from the GPIO or low power oscillator source, then Timer1
continues to operate.
Timer1 reloads the value from T1LD when Timer1 overflows.
Timer1 Load Register
Name: T1LD
Address: 0xFFFF0320
Default Value: After a reset, this register contains the upper half
of the assembly lot ID (0x00000000).
Access: Read/write
Function: This 32-bit register holds the 32-bit value that is loaded
into the counter.
Timer1 Clear Register
Name: T1CLRI
Address: 0xFFFF032C
Access: Write only
Function: This 8-bit, write only MMR is written (with any value)
by user code to clear the interrupt.
Timer1 Value Register
Name: T1VAL
Address: 0xFFFF0324
Default Value: 0xFFFFFFFF
Access: Read only
Function: This 32-bit register holds the current value of Timer1.
TIMER1
VALUE
LOW POWER
32.768kHz OSCILLATOR
CORE
CLOCK FREQUENCY
GPIO
TIMER1 IRQ
32-BIT
UP/DOWN COUNTER
8-BIT
POSTSCALER
32-BIT LOAD
CAPTURE
IRQ[31:0]
PRESCALER
1, 16, 256, OR 32,768
07
47
4-
03
3
Figure 36. Timer1 Block Diagram
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