- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16860 > EVAL-ADUC7036QSPZ (Analog Devices Inc)BOARD EVAL FOR ADUC7036 PDF資料下載
參數(shù)資料
| 型號(hào)： | EVAL-ADUC7036QSPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 90/132頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7036 |
| 設(shè)計(jì)資源： | EVAL-ADUC7036 Schematic & Brd Outline EVAL ADUC7036 Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 主要目的： | 電源管理，電池監(jiān)控器 |
| 嵌入式： | 是，MCU，16/32 位 |
| 已用 IC / 零件： | ADuC7036 |
| 已供物品： | 板，線纜，文檔，仿真器，電源，軟件 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)當(dāng)前第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)
ADuC7036
Rev. C | Page 60 of 132
For the current channel ADC,
The offset coefficient is read from the ADC0OF calibration
register and is a 16-bit, twos complement number. The range of
this number, in terms of the signal chain, is effectively ±1.
Therefore, 1 LSB of the ADC0OF register is not the same as
1 LSB of the ADC0DAT register.
NOM
REF
IN
OUT
ADCxGN
ADCxOF
K
V
PGA
V
ADC
×
=
×
where K is dependent on the PGA gain setting and ADC mode.
A positive value of ADC0OF indicates that when offset is
subtracted from the output of the filter, a negative value is added.
The nominal value of this register is 0x0000, indicating zero
offset is to be removed. The actual offset of the ADC can vary
slightly from part to part and at different PGA gains. The offset
within the ADC is minimized if the chopping mode is enabled
(that is, ADCFLT[15] = 1).
Normal Mode
In normal mode, K = 1 for PGA gains of 1, 4, 8, 16, 32, and 64;
K = 2 for PGA gains of 2 and 128; K = 4 for a PGA gain of 256;
and K = 8 for a PGA gain of 512.
Low Power Mode
In low power mode, K = 32 for a PGA gain of 128. In addition,
if the REG_AVDD/2 reference is used, the K factor doubles.
The gain coefficient is read from the ADC0GN register and is a
unitless scaling factor. The 16-bit value in this register is divided
by 16,384 and then multiplied by the offset-corrected value. The
nominal value of this register equals 0x5555, corresponding to a
multiplication factor of 1.3333, and scales the nominal ±0.75 signal
to produce a full-scale output signal of ±1. The resulting output
signal is checked for overflow/underflow and converted to twos
complement or unipolar mode before being output to the data
register.
Low Power Plus Mode
In low power plus mode, K = 8 for a PGA gain of 512. In addition,
if the REG_AVDD/2 reference is used, the K factor doubles.
ADC DIAGNOSTICS
The ADuC7036 features a diagnostic capability and open-
circuit detection on both ADCs.
Current ADC Diagnostics
The actual gain and the required scaling coefficient for zero
gain error vary slightly from part to part at different PGA set-
tings in normal and low power modes. The value downloaded into
ADC0GN during a power-on reset represents the scaling factor
for a PGA gain of 1. If a different PGA setting is used, however,
some gain error may be present. To correct this error, overwrite
the calibration coefficients via user code or perform an ADC
calibration.
The ADuC7036 features the capability to detect open-circuit
conditions on the current channel inputs. This is accomplished
using the two current sources on IIN+ and IIN, which are
controlled via ADC0CON[14:13].
Note that the IIN+ and IIN current sources have a tolerance of
±30%. Therefore, a PGA gain ≥ 2 (ADC0CON[3:0] ≥ 0001) must
be used when current sources are enabled.
The simplified ADC transfer function can be described as
Temperature ADC Diagnostics
The ADuC7036 features the capability to detect open-circuit
conditions on the temperature channel inputs. This is
accomplished using the two current sources on VTEMP and
GND_SW, which are controlled via ADC1CON[14:13].
NOM
REF
IN
OUT
ADCxGN
ADCxOF
V
PGA
V
ADC
×
×
=
where the equation is valid for the voltage/temperature chan-
nel ADC.
Voltage ADC Diagnostics
The ADuC7036 features the capability to detect open-circuit
conditions on the voltage channel input. This is accomplished
using the current source on the voltage attenuator, controlled by
the high voltage register HVCFG1[7].
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EVB90308 | DEMO KIT MLX90308 SENS INTERFACE |
| MLG0603S4N7S | INDUCTOR MULTILAYER 4.7NH 0201 |
| KSZ8041TL-EVAL | BOARD EVALUATION KSZ8041TL |
| EEU-FR1J180 | CAP ALUM 18UF 63V 20% RADIAL |
| MLG0603S3N6S | INDUCTOR MULTILAYER 3.6NH 0201 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-ADUC7039QSPZ | 功能描述:BOARD EVAL FOR ADUC7039 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| EVAL-ADUC7060QSPZ | 功能描述:KIT DEV QUICK START ADUC7060 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| EVAL-ADUC7060QSPZU1 | 制造商:Analog Devices 功能描述: |
| EVALADUC7060QSPZU2 | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits) |
| EVAL-ADUC7061MKZ | 功能描述:開發(fā)板和工具包 - ARM Quick Start Development System RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。