參數(shù)資料
型號： EVAL-ADUC832QSZ
廠商： Analog Devices Inc
文件頁數(shù)： 14/92頁
文件大?。?/td> 0K
描述： KIT DEV FOR ADUC832 QUICK START
產(chǎn)品培訓模塊： Process Control
標準包裝： 1
系列： QuickStart™ 套件
類型： MCU
適用于相關產(chǎn)品： ADuC832
所含物品： 評估板，線纜，電源，軟件和文檔
其它名稱： EVAL-ADUC832QS
EVAL-ADUC832QS-ND
Data Sheet
ADuC832
Rev. B | Page 21 of 92
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
52
1
2
3
4
5
6
7
8
9
10
13
12
11
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
P
0.
7/
AD7
P
0.
6/
AD6
P
0.
5/
AD5
P
0.
4/
AD4
DV
DD
DG
ND
P
0.
3/
AD3
P
0.
2/
AD2
P
0.
1/
AD1
P
0.
0/
AD0
AL
E
PSEN
EA
P1.0/ADC0/T2
P1.1/ADC1/T2EX
P1.2/ADC2
P1.3/ADC3
AVDD
AGND
CREF
VREF
DAC0
DAC1
P1.4/ADC4
P1.5/ADC5/SS
P1.6/ADC6
P2.7/PWM1/A15/A23
P2.6/PWM0/A14/A22
P2.5/A13/A21
P2.4/A12/A20
DGND
DVDD
XTAL2
XTAL1
P2.3/A11/A19
P2.2/A10/A18
P2.1/A9/A17
P2.0/A8/A16
SDATA/MOSI
P
1.
7/
ADC7
R
ESET
P
3.
0/
RxD
P
3.
1/
T
xD
P
3
.2
/IN
T0
P
3
.3
/IN
T1
/M
IS
O/P
WM
1
DV
DD
DG
ND
P
3
.4
/T0
/P
WM
C
/P
WM
0
/E
X
TC
LK
P
3.
5/
T
1/
CO
NV
S
T
P
3.
7/
RD
S
CL
O
CK
P
3.
6/
W
R
ADuC832
51 50 49 48 47 46 45 44 43 42 41 40
02987-
002
Figure 14. 52-Lead MQFP
P
1.
6/
ADC6
P
.7/
ADC7
R
ESET
P
3.
0/
RxD
P
3.
1/
T
xD
P
3
.3
/IN
T1
/M
IS
O/P
WM
1
P
3
.2
/IN
T0
DV
DD
DG
ND
P
3
.4
/T0
/P
WM
C
/P
WM
0
/E
X
TC
LK
P
3.
5/
T
1/
CO
NV
S
T
P
3.
6/
W
R
P
3.
7/
RD
S
CL
O
CK
ADuC832
TOP VIEW
(Not to Scale)
P2.7/PWM1/A15/A23
P2.6/PWM0/A14/A22
P2.5/A13/A21
P2.4/A12/A20
DGND
DVDD
XTAL1
P2.3/A11/A19
P2.2/A10/A18
P2.1/A9/A17
P2.0/A8/A16
SDATA/MOSI
XTAL2
02987-
003
PSEN
EA
PIN 1
INDICATOR
1
P1.1/ADC1/T2EX
2
P1.2/ADC2
3
P1.3/ADC3
4
AVDD
5
AVDD
6
AGND
7
AGND
8
AGND
9
CREF
10
VREF
11
DAC0
12
DAC1
13
P1.4/ADC4
14
P1.5/ADC5/SS
35
36
37
38
39
40
41
42
34
33
32
31
30
29
15
16
17
19
21
20
22
23
24
25
26
27
28
18
45
AL
E
46
P
0.
0/
AD0
47
P
0.
1/
AD1
48
P
0.
2/
AD2
49
P
0.
3/
AD3
50
DG
ND
51
DV
DD
52
P
0.
4/
AD4
53
P
0.
5/
AD5
54
P
0.
6/
AD6
44
43
55
P
0.
7/
AD7
56
P
1.
0/
ADC0/
T
2
NOTES
1. THE LFCSP HAS AN EXPOSED PADDLE THAT MUST BE SOLDERED
TO THE PCB BUT ELECTRICALLY LEFT UNCONNECTED.
Figure 15. 56-Lead LFCSP
Table 13. Pin Function Descriptions
Pin No.
Mnemonic
MQFP
LFCSP
Type
Description
Exposed Paddle
N/A
0
The LFCSP has an exposed paddle that must be soldered to the PCB but left
unconnected.
P1.0/ADC0/T2
1
56
I
Input Port 1 (P1.0). Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults
to analog input mode. To configure any Port 1 pin as a digital input, write a 0 to the
Port 1 bit. Port 1 pins are multifunctional and share the following functionality.
I
Single-Ended Analog Input (ADC0). Channel selection is via ADCCON2 SFR.
I
Timer/Counter 2 Digital Input (T2). When enabled, Counter 2 is incremented in
response to a 1-to-0 transition of the T2 input.
P1.1/ADC1/T2EX
2
1
I
Input Port 1 (P1.1). Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults
to analog input mode. To configure any Port 1 pin as a digital input, write a 0 to the
Port 1 bit. Port 1 pins are multifunctional and share the following functionality.
I
Single-Ended Analog Input (ADC1). Channel selection is via ADCCON2 SFR.
I
Digital Input (T2EX). Capture/Reload trigger for Counter 2; also functions as an
up/down control input for Counter 2.
P1.2/ADC2
3
2
I
Input Port 1 (P1.2). Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults
to analog input mode. To configure any Port 1 pin as a digital input, write a 0 to the
Port 1 bit. Port 1 pins are multifunctional and share the following functionality.
I
Single-Ended Analog Input (ADC2). Channel selection is via ADCCON2 SFR.
P1.3/ADC3
4
3
I
Input Port 1 (P1.3). Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults
to analog input mode. To configure any Port 1 pin as a digital input, write a 0 to the
Port 1 bit. Port 1 pins are multifunctional and share the following functionality.
I
Single-Ended Analog Input (ADC3). Channel selection is via ADCCON2 SFR.
AVDD
5
4, 5
P
Analog Positive Supply Voltage, 3 V or 5 V Nominal.
AGND
6
6, 7, 8
G
Analog Ground. Ground reference point for the analog circuitry.
CREF
7
9
I/O
Decoupling Input for On-Chip Reference. Connect 0.1 μF between this pin and AGND.
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