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| 型號： | EVAL-ADV7393EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 75/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADV7393 ENCODER |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 視頻，視頻編碼器 |
| 已用 IC / 零件： | ADV7393 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | ADV7393BCPZ-ND - IC DAC VIDEO HDTV 10BIT 40LFCSP ADV7393BCPZ-REEL-ND - IC DAC ENCODER VID HDTV 40-LFCSP |
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Data Sheet
ADV7390/ADV7391/ADV7392/ADV7393
Rev. G | Page 69 of 108
PRINTED CIRCUIT BOARD LAYOUT AND DESIGN
UNUSED PINS
If the HSYNC and VSYNC pins are not used, they should be tied
to VDD_IO through a pull-up resistor (10 k or 4.7 k). Any
other unused digital inputs should be tied to ground. Unused
digital output pins should be left floating. DAC outputs can
either be left floating or connected to GND. Disabling these
outputs is recommended.
DAC CONFIGURATIONS
The ADV739x contains three DACs. All three DACs can be
configured to operate in full-drive mode. Full-drive mode is
defined as 34.7 mA full-scale current into a 37.5 load, RL.
Full drive is the recommended mode of operation for the DACs.
Alternatively, all three DACs can be configured to operate in low-
drive mode. Low-drive mode is defined as 4.33 mA full-scale
current into a 300 load, RL.
The ADV739x contains an RSET pin. A resistor connected between
the RSET pin and AGND is used to control the full-scale output
current and, therefore, the output voltage levels of DAC 1, DAC 2,
and DAC 3. For full-drive operation, RSET must have a value of
510 and RL must have a value of 37.5 . For low-drive opera-
tion, RSET must have a value of 4.12 k, and RL must have a value
of 300 . The resistor connected to the RSET pin should have a
1% tolerance.
The ADV739x contains a compensation pin, COMP. A 2.2 nF
compensation capacitor should be connected from the COMP
pin to VAA.
VIDEO OUTPUT BUFFER AND OPTIONAL
OUTPUT FILTER
An output buffer is necessary on any DAC that operates in low-
drive mode (RSET = 4.12 k, RL = 300 ). Analog Devices
produces a range of op amps suitable for this application, for
example, the AD8061. For more information about line driver
buffering circuits, see the relevant op amp data sheet.
An optional reconstruction (anti-imaging) low-pass filter (LPF)
may be required on the ADV739x DAC outputs. The filter
specifications vary with the application. The use of 16× (SD),
8× (ED), or 4× (HD) oversampling can remove the requirement
for a reconstruction filter altogether.
For applications requiring an output buffer and reconstruction
buffers should be considered.
Table 57. ADV739x Output Rates
Input Mode
(Subaddress 0x01,
Bits[6:4])
Oversampling
Output Rate (MHz)
SD
Off
27
(2×)
On
108
(8×)
On
216
(16×)
ED
Off
27
(1×)
On
108
(4×)
On
216
(8×)
HD
Off
74.25
(1×)
On
148.5
(2×)
On
297
(4×)
Table 58. Output Filter Requirements
Application
Oversampling
Cutoff
Frequency
(MHz)
Attenuation
–50 dB at
(MHz)
SD
2×
> 6.5
20.5
8×
> 6.5
101.5
16×
> 6.5
209.5
ED
1×
> 12.5
14.5
4×
> 12.5
95.5
8×
> 12.5
203.5
HD
1×
> 30
44.25
2×
> 30
118.5
4×
> 30
267
Figure 87. Example of Output Filter for SD, 16× Oversampling
Figure 88. Example of Output Filter for ED, 8× Oversampling
Figure 89. Example of Output Filter for HD, 4× Oversampling
560
600
22pF
600
DAC
OUTPUT
75
BNC
OUTPUT
10H
560
3
4
1
06234-
086
560
6.8pF
600
6.8pF
600
DAC
OUTPUT
75
BNC
OUTPUT
4.7H
560
3
4
1
06234-
087
DAC
OUTPUT
390nH
33pF
75
500
300
75
BNC
OUTPUT
500
3
4
1
3
4
1
06234-
088
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