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| 型號(hào)： | GT-48208 |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級(jí)交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| 中文描述： | 先進(jìn)的交換式以太網(wǎng)控制器的10 10/100 BaseX（高級(jí)交換式10 10/100 BaseX以太網(wǎng)控制器） |
| 文件頁(yè)數(shù)： | 126/135頁(yè) |
| 文件大?。?/td> | 1619K |
| 代理商： | GT-48208 |
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GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
GALI
LEO
TECHNOLOGY
CONFI
D
ENTI
AL
--
DO
NOT
REPRODUCE
90
Revision 1.2
11:9
TxQueThr
Transmit Queue Threshold
These bits determine the threshold of the Transmit
Queue. When the Transmit queue exceeds this limit, a
packet that destined to this queue will be discarded.
000: Threshold is 64 in 1M, 256 in 4M
001: Threshold is 128 in 1M, 512 in 4M
010: Threshold is 192 in 1M, 768 in 4M
011: Threshold is 256 in 1M, 1024 in 4M
100: Threshold is 320 in 1M, 1280 in 4M
101: Threshold is 384 in 1M, 1536 in 4M
110: Threshold is 448 in 1M, 1792 in 4M
111: Threshold is 512 in 1M, 2048 in 4M
0x3
Table 29: Interrupt Cause, Offset: 0x18
B i t s
Field N a me
Funct i on
Initial Va lue
0
IntSumm
Interrupt Summary.
Logical ‘OR’ of all the interrupt bits and their mask.
IntSumm is exactly the inverse polarity of Int* pin.
0x0
1
TxDescH
This bit is set by the GT-482xx upon loading the CPU Tx
High Priority Desc register
0x0
2
TxDescL
This bit is set by the GT-482xx upon loading the CPU Tx
Low Priority Desc register
0x0
3
EmptyBuff
This bit is set by the GT-482xx upon loading the CPU
Empty List register
0x0
4
Query
This bit is set by the GT-482xx upon loading the Query
register
0x0
5
AddrRecF
Address Recognition Failed.
This bit is set by the GT-482xx when the address recog-
nition cycle fails (due to a large number of MAC
addresses).
0x0
6
FlushTxQ
Flush Tx Queue.
This bit is set by the GT-482xx when one of the Tx
queues is flushed due to the Watchdog Timer.
0x0
7
LinkChange
Link State Change.
This bit is set by the GT-482xx upon a change in the link
state (down->up, up->down) for any port.
0x0
8
Part
Partition.
This bit is set by the GT-482xx upon entering Partition
state in one of the ports.
0x0
22:9
EaseRegister
Ease_Register of port 13 to 0 has reached terminal
count of 0
0x0
Table 28: Watchdog and Tx Threshold Register, Offset: 0x14
B i t s
Field N ame
Funct ion
Initial Va lu e
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| GT48212-A6-PBB1C000 | 制造商:Marvell 功能描述: |
| GT48212-A6-PBB-C000 | 制造商:Marvell 功能描述:12 PORT E + 2 PORT FE SWITCH (MANAGED) - Trays |
| GT48300-A1-BBE1C083 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE1C083 |
| GT48300-A1-BBE-C000 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE-C000 |
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