參數(shù)資料
型號： GT-48208
廠商： Galileo Technology Services, LLC
英文描述： Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器)
中文描述： 先進的交換式以太網(wǎng)控制器的10 10/100 BaseX（高級交換式10 10/100 BaseX以太網(wǎng)控制器）
文件頁數(shù)： 132/135頁
文件大?。?/td> 1619K
代理商： GT-48208
GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
GALI
LEO
TECHNOLOGY
CONFI
D
ENTI
AL
--
DO
NOT
REPRODUCE
96
Revision 1.2
24
Pd
Priority Destination
0 - Low
1 - High
0x0
25
Ps
Priority Source
0 - Low
1 - High
0x0
26
St
Static
0 - Learn address every time it comes in on different port
1 - Do not learn address every time it comes in on differ-
ent port
0x0
27
Mult
Multiple (only valid if Static is ‘1’)
0 - Do not send to multiple ports on static address
1 -Send on multiple ports to static address
0x0
28
Id
Intervention Destination
0 - Intervention on Destination Address not set
1 - Intervention on Destination Address is set
0x0
29
Is
Intervention Source
0 - Intervention on Source Address is not set
1 - Intervention on Source Address is set
0x0
31:30
Reserved
0x0
Table 41: CPU New Address3, Offset: 0x48
B i t s
Field N a m e
Funct ion
Initial Va lue
14:0
Forw
Forwarding bits for ports [13:0] and the CPU (#14)
0x0
30:15
Reserved
0x0
31
Busy
Busy bit
0 - Not Busy, the CPU can re-load this register
1 - Busy - The data in this register was not processed.
The CPU should not re-load this register.
Busy bit is set to 1 by the CPU and cleared when the GT-
482xx takes the data.
Note: The Busy bit applies to all three CPU New Address
Registers at offsets 0x40, 0x44, and 0x48.
0x0
Table 42: CPU Query, Offset: 0x4C
B i t s
Field N ame
Function
Initial Va lue
0
Reserved
0x0
Table 40: CPU New Address2, Offset: 0x44 (Continued)
B i t s
Field N a m e
Function
Initial Va lue
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