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| 型號(hào)： | GT-48208 |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級(jí)交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| 中文描述： | 先進(jìn)的交換式以太網(wǎng)控制器的10 10/100 BaseX（高級(jí)交換式10 10/100 BaseX以太網(wǎng)控制器） |
| 文件頁數(shù)： | 67/135頁 |
| 文件大?。?/td> | 1619K |
| 代理商： | GT-48208 |
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GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
GALI
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Revision 1.2
37
8.
FAST ETHERNET INTERFACES
The GT-482xx interfaces directly to two MII (Media Independent Interface) ports which are compliant with the
IEEE standard (please see 802.3u Fast Ethernet standard for detailed interface information and timing parame-
ters). Each MII port has the following characteristics:
Capable of supporting both 10 Mbps and 100 Mbps data rates in half or full duplex modes
Data and delimiters are synchronous to clock references
Provides independent 4-bit wide transmit and receive paths
Uses TTL signal levels
Provides a simple management interface (common to all ports)
Capable of driving a limited length of shielded cable
Supports full Auto-Negotiation
Supports flow control for full duplex and back pressure for half duplex
In addition, for switch expansion, port #13 can work at a clock frequency of up to 60Mhz. In this mode the
ForceLinkPass (DAddr[5 and 6] at reset) pin must be pulled down.
The GT-482xx incorporates all of the required digital circuitry to interface to 100BaseTX, 100BaseT4, and
100BaseFX. Two Fast Ethernet ports are integrated in the GT-482xx and only a small amount of external logic is
needed to implement standard physical interfaces.
8.1
10/100 MII Compatible Interface
The GT-482xx MAC allows it to be connected to a 10Mbps or 100Mbps network. The GT-482xx interfaces to an
IEEE 802.3 10/100 Mbps MII compatible PHY device. The data path consists of a separate nibble-wide stream for
both transmit and receive activities. The GT-482xx can switch automatically between 10 or 100 Mbps operation
depending on the speed of the network. Data transfers are clocked by 25 MHz transmit and receive clocks in 100
Mbps operation, or by 2.5 MHz transmit and receive clocks in 10 Mbps operation. The clock inputs are driven by
the PHY, which controls the clock rate based on Auto-Negotiation.
8.2
Media Access Control (MAC)
The GT-482xx MAC performs all of the functions of the 802.3 protocol such as frame formatting, frame stripping,
collision handling, deferral to link traffic, etc. The GT-482xx ensures that any outgoing packet complies with the
802.3 specification in terms of preamble structure. The GT-482xx transmits 56 preamble bits before Start of
Frame Delimiter (SFD). The GT-482xx operates in half-duplex or full-duplex modes. In half-duplex mode, the GT-
482xx checks that there is no competitor for the network bus before transmission. In addition to listening for a
clear line before transmitting, the GT-482xx handles collisions in a pre-determined way. If two nodes attempt to
transmit at the same time, the signals collide and the data on the line is garbled. The GT-482xx listens while it is
transmitting, and it can detect a collision. If a collision is detected, the GT-482xx transmits a ‘JAM’ pattern and
then delays its re-transmission for a random time period determined by the backoff algorithm. In full-duplex mode,
the GT-482xx transmits unconditionally.
8.3
Auto-Negotiation
8.3.1
Disabled Auto-Negotiation
When DData[27:26] are LOW at reset, Auto-Negotiation is disabled for both ports and each port can be selected
as half- or full-duplex mode independently. After RESET the port mode is set by the state sampled on the
Ddata[25:24] pin. This value can be overridden in each port’s Port Control register. The operation speed for each
port (10Mbps or 100Mbps) is determined by the frequency of TxClk[x] and RxClk[x] generated by the PHY. When
the port is operating at 10Mbps, the PHY generates a 2.5MHz clock for both TxClk and RxClk. When the port is
operating at 100Mbps, the PHY generates a 25MHz clock for both TxClk and RxClk.
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