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| 型號(hào)： | ICS1892Y-10 |
| 英文描述： | 10Base-T/100Base-TX Integrated PHYceiver |
| 文件頁(yè)數(shù)： | 76/148頁(yè) |
| 文件大?。?/td> | 816K |
| 代理商： | ICS1892Y-10 |
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ICS1892, Rev. D, 2/26/01
February 26, 2001
76
Chapter 8
Management Register Set
ICS1892 Data Sheet
2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
8.6.2
IEEE Reserved Bit (bit 4.14)
The ISO/IEC specification reserves this bit for future use. However, the ISO/IEC Standard also defines bit
4.14 as the Acknowledge bit.
When this reserved bit is read by an STA, the ICS1892 returns a logic zero. However, whenever an STA
writes to this reserved bit, it must use the default value specified in this data sheet. ICS uses some of these
reserved bits to invoke auxiliary functions. To ensure proper operation of the ICS1892, an STA must
maintain the default value of these bits. Therefore, ICS recommends that an STA always write the default
value of any reserved bits during all management register write operations.
Reserved bit 4.14 is a Command Override Write (CW) bit. Whenever bit 16.15 (the Command Register
Override bit) is logic:
Zero, the ICS1892 isolates all STA writes to bit 4.14.
One, an STA can modify the value of bit 4.14.
8.6.3
Remote Fault (bit 4.13)
When the ICS1892 Auto-Negotiation sublayer is enabled, the ICS1892 transmits the Remote Fault bit 4.13
to its remote link partner during the auto-negotiation process. The Remote Fault bit is part of the Link Code
Word that the ICS1892 exchanges with its remote link partner. The ICS1892 sets this bit to logic one
whenever it detects a problem with the link, locally. This data is sent to the remote link partner to inform it
of the potential problem. If the ICS1892 does not detect a link fault, it clears bit 4.13 to logic zero.
Whenever the ICS1892:
Does not detect a link fault, the ICS1892 clears bit 4.13 to logic zero.
Detects a problem with the link, during the auto-negotiation process, this bit is set. As a result, the data
on this bit is sent to the remote link partner to inform it of the potential problem.
8.6.4
Technology Ability Field (bits 4.12:5)
When its Auto-Negotiation sublayer is enabled, the ICS1892 transmits its link capabilities to its remote link
partner during the auto-negotiation process. The Technology Ability Field (TAF) bits 4.12:5 determine the
specific abilities that the ICS1892 advertises. The ISO/IEC specification defines the TAF technologies in
Annex 28B.
The ISO/IEC specification reserves bits 4.12:10 for future use. When each of these reserved bits is:
Read by an STA, the ICS1892 returns a logic zero
Written to by an STA, the STA must use the default value specified in this data sheet.
ICS uses some of these reserved bits to invoke auxiliary functions. To ensure proper operation of the
ICS1892, an STA must maintain the default value of these bits. Therefore, ICS recommends that an STA
always write the default value of any reserved bits during all management register write operations.
Reserved bits 4.12:10 are Command Override Write (CW) bits. Whenever bit 16.15 (the Command
Register Override bit) is logic: See para 8.1.2
Zero, the ICS1892 isolates all STA writes to CW bits, including bits 4.12:10.
One, an STA can modify the value of bits 4.12:10
Each of the bits 4.9:5 in the TAF represent a specific technology capability. When one of these bits is logic:
Zero, it indicates to the remote link partner that the local device cannot support the technology
represented by the bit.
One, it indicates to the remote link partner that the local device can support the technology.
With the exception of bit 4.9, the default settings of the TAF bits depend on the ICS1892 operating mode.
Bit 4.9 is always logic zero, indicating that the ICS1892 cannot support 100Base-T4 operations.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS1892Y-14 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893AF | 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM |
| ICS1893Y-10 | 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM |
| ICS1893 | 3.3-V 10Base-T/100Base-TX Integrated PHYceiver⑩ |
| ICS2002 | Wavedec Digital Audio Codec |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1892Y-14 | 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893 | 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893_09 | 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver? |
| ICS1893AF | 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| ICS1893AFI | 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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