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參數(shù)資料
| 型號： | ICS1892Y |
| 英文描述： | 10Base-T/100Base-TX Integrated PHYceiver |
| 文件頁數(shù)： | 49/148頁 |
| 文件大小： | 816K |
| 代理商： | ICS1892Y |
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Chapter 7
Functional Blocks
ICS1892, Rev. D, 2/26/01
February 26, 2001
49
ICS1892
2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
7.5
Functional Block: 10Base-T Operations
The ICS1892 supports both 10Base-T and 100Base-TX operations. When configured for 10Base-T mode,
the MAC/Repeater Interface can provide either a 10M MII (Media Independent Interface) or a 10M Serial
Interface. The Twisted-Pair Interface is not configurable. ISO/IEC standards specifically define its
operation. (For more information on the Twisted-Pair Interface, see
Section 6.6, “Twisted-Pair Interface”
.)
There are some important differences between 10Base-T and 100Base-TX operations. The 10Base-T
operation is fundamentally simpler than 100Base-TX. The data rate is slower, requiring less encoding than
100Base-TX operations (that is, the bandwidth requirements and the line attenuation issues are not as
severe as with 100-MHz operations). Consequently, when the ICS1892 is set for 10Base-T operations, it
uses fewer sublayers in contrast to 100Base-TX operations.
For an overview of 10Base-T operations, see
Section 5.6, “10Base-T Operations”
.
7.5.1
10Base-T Operation: Manchester Encoder/Decoder
The ISO/IEC specification requires the use of a Manchester-encoded signal for 10Base-T operations.
During transmission operations, the ICS1892 acquires data from the MAC/Repeater Interface, in either
4-bit nibbles or as a serial bit stream.
A Manchester Encoder encodes the data before passing it to the Twisted-Pair Transmitter. In a
Manchester-encoded signal, all logic:
Ones are:
– Positive during the first half of the bit period
– Negative during the second half of the bit period
Zeros are:
– Negative during the first half of the bit period
– Positive during the second half of the bit period
During reception operations, a Manchester Decoder translates the serial bit stream obtained from the
Twisted-Pair Receiver into an NRZ bit stream. The Manchester Decoder subsequently passes the data to
the MAC/Repeater Interface in either serial or parallel format, depending on the interface configuration.
The advantages in using Manchester-encoded signals are the following:
Each bit period has an encoded clock.
The split-phase nature of the signal always provides a zero DC level regardless of the data.
The primary disadvantage in using Manchester-encoded signals is that it doubles the data rate, making it
operationally prohibitive for 100-MHz operations.
7.5.2
10Base-T Operation: Clock Synthesis
The ICS1892 synthesizes the clocks required for synchronizing data transmission. In 10Base-T mode, the
MAC/Repeater Interface can provide either a 10M MII (Media Independent Interface) or a 10M Serial
Interface. When the ICS1892 is configured to support a:
10M MII interface, the ICS1892 synthesizes a 2.5-MHz clock for nibble-wide transactions
10M Serial Interface to the MAC/repeater, the ICS1892 synthesizes a 10-MHz clock
7.5.3
10Base-T Operation: Clock Recovery
The ICS1892 recovers its receive clock from the data stream obtained from the Twisted-Pair Receiver. It
employs a phase-locked loop (PLL) to recover the clock from this Manchester-encoded data.
Subsequently, the ICS1892 uses this recovered clock for synchronizing the data transmission between
itself and the MAC/repeater. Receive-clock PLL acquisition begins with reception of the MAC Frame
Preamble and continues as long as the ICS1892 is receiving data.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS1892Y-10 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-14 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893AF | 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM |
| ICS1893Y-10 | 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM |
| ICS1893 | 3.3-V 10Base-T/100Base-TX Integrated PHYceiver⑩ |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1892Y-10 | 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-14 | 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893 | 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893_09 | 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver? |
| ICS1893AF | 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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