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參數(shù)資料
| 型號(hào)： | IDT77155L155PX |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS |
| 中文描述： | ATM NETWORK INTERFACE, PQFP128 |
| 封裝： | 20 X 14 MM, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 30/50頁 |
| 文件大小： | 307K |
| 代理商： | IDT77155L155PX |
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8.03
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IDT77155
155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE
ADVANCED INFORMATION
Commercial Temperature Range
TRANSMIT POINTER CONTROL REGISTER
ADDRESS 0X41
DEFAULT = 8’B00000000
Bit
Bit 7
Bit 6
Type
—
R/W
Symbol
—
frcPtr
Function
Reserved
Force the insertion of the pointer values (H1 & H2 bytes) in the pointer registers
(‘h45, ‘h46) into the transmit stream for diagnostics. The SPE
and other overheads are transmitted in a normal fashion although it would
not be extracted by the receiving logic due to an incorrect pointer. At least
one corrupted pointer is guaranteed to be sent.
Stuff opportunity spacing between consecutive SPE stuff events. When
asserted to a logic one, stuff events controlled by incPtr and decPtris
generated at a maximum rate of once every four frames. Else, stuff
events may be generated every frame.
Initialize pointer value of next frame with pointer value contained in ‘h45
and ‘h46. The registers at ‘h45 and ‘h46 are initialized before this bit is set
to a logic one. If a legal pointer value is loaded (0 <= pointer <= 782) then
the transmit pointer value is changed to this value with the SPE being
modified to this position appropriately. This bit is cleared once the new
pointer is loaded.
Controls insertion of the new data flags in ‘h46 into the transmit stream.
When asserted to a logic one, the pattern in ‘h46 is inserted continuously
in the payload pointer. When disabled, the normal pointer value (‘b0110)
is inserted.
Decrement pointer in the next immediate frame. This bit is cleared when
the new pointer value is inserted in the transmit stream. This bit has no
effect if the transmit fixPtr bit is asserted.
Increment pointer in the next immediate stream. This bit is cleared when
the new pointer value is inserted in the transmit stream. This bit has no
effect if the transmit fixPtr bit is asserted.
Reserved
Bit 5
R/W
stuffCtl
Bit 4
R/W
Ptr
Bit 3
R/W
NDF
Bit 2
R/W
decPtr
Bit 1
R/W
incPtr
Bit 7
—
—
TRANSMIT POINTER LSB REGISTER
DEFAULT = 8’B00000000
ADDRESS 0X45
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R
R
R
R
R
R
R
Symbol
arbPtr[7]
arbPtr[6]
arbPtr[5]
arbPtr[4]
arbPtr[3]
arbPtr[2]
arbPtr1]
arbPtr[0]
Function
Arbitrary pointer Bit 7
Arbitrary pointer Bit 6
Arbitrary pointer Bit 5
Arbitrary pointer Bit 4
Arbitrary pointer Bit 3
Arbitrary pointer Bit 2
Arbitrary pointer Bit 1
Arbitrary pointer Bit 0
NOTE:
1. arbPtr[7:0] Payload pointer to be inserted into frame if Ptr is set. A legal
value results in the transmit payload pointer changing to the correspond-
ing byte position. If the frcPtr bit is set, the payload pointer changes to
this arbitrary value but the SPE position remains unchanged.
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