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參數(shù)資料
| 型號： | IDT77155L155PX |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS |
| 中文描述： | ATM NETWORK INTERFACE, PQFP128 |
| 封裝： | 20 X 14 MM, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 41/50頁 |
| 文件大?。?/td> | 307K |
| 代理商： | IDT77155L155PX |
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IIDT77155
155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE
ADVANCED INFORMATION
Commercial Temperature Range
8.03
41
TRANSMIT ID ADDRESS REGISTER
ADDRESS 0X68
DEFAULT = 8’B00000000
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Type
—
—
—
—
—
—
R/W
Symbol
—
—
—
—
—
—
txIDAddr[1]
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Device ID value for the transmit portion of the transmit UTOPIA logic. In
multi-PHY mode, the appropriate transmit UTOPIA signals are driven as
per UTOPIA level 2 protocol when the TXADDR bus value matches the
value in this register. This has no effect in single-PHY mode.
Bit 0
R/W
txIDAddr[0]
RECEIVE BER STATUS/CONTROL REGISTER
ADDRESS 0X70
DEFAULT = 8’B00000011
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Type
—
—
—
—
R/W
Symbol
—
—
—
—
FailIEn
Function
Reserved
Reserved
Reserved
Reserved
Interrupt enable for BER failure. Enables the generation of an interrupt
upon the detection of a BER failure condition.
Interrupt enable for BER warning. Enables the generation of an interrupt
upon the detection of a BER warning condition.
BER failure status indication. It is initially asserted at reset. Clearing this
bit triggers the BER failure algorithm. This bit is cleared when the register
is read. It is also as the indication of B2 EBER.
BER warning status indication. It is initially asserted at reset. Clearing this
bit triggers the BER warning algorithm. This bit is cleared when the
register is read.
Bit 2
R/W
WarnIEn
Bit 1
R/W
BERfail
Bit 0
R/W
BERwarn
RECEIVE BER FAIL THRESHOLD REGISTER
ADDRESS 0X71
DEFAULT = 8’B00000000
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Symbol
ThldFail[7]
ThldFail[6]
ThldFail[5]
ThldFail[4]
ThldFail[3]
ThldFail[2]
ThldFail[1]
ThldFail[0]
Function
Value for the failure threshold of the BER fail algorithm.
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相關(guān)代理商/技術(shù)參數(shù) |
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| IDT77V011L155DA | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| IDT77V011L155DA8 | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| IDT77V106L25TF | 制造商:Integrated Device Technology Inc 功能描述: |
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