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| 型號(hào)： | IDT82V2108PX8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 157/292頁(yè) |
| 文件大小： | 0K |
| 描述： | IC FRAMER T1/J1/E1 8CH 128-PQFP |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 控制器類(lèi)型： | T1/E1/J1 調(diào)幀器 |
| 接口： | 并聯(lián) |
| 電源電壓： | 2.97 V ~ 3.63 V |
| 電流 - 電源： | 160mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 帶卷 (TR) |
| 其它名稱(chēng)： | 82V2108PX8 |
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IDT82V2108
T1 / E1 / J1 OCTAL FRAMER
Functional Description
14
March 5, 2009
3.2.1.1
Synchronization Searching
All the frame synchronization functions can only be executed when
the UNF (b6, E1-000H) is ‘0’.
3.2.1.1.1
Basic Frame
The algorithm of searching for the E1 Basic Frame alignment pat-
tern (as shown in Figure 4) meets the ITU-T Recommendation G.706
4.1.2 and 4.2.
Figure 4. Basic Frame Searching Process
Generally, it is performed by detecting a successive FAS/NFAS/
FAS sequence. If STEP 2 is not met, a new search will start after the fol-
lowing frame is skipped. If STEP 3 is not met, a new search will start
immediately in the next frame. Once the Basic Frame alignment pattern
is detected in the received PCM data stream, the Basic Frame synchro-
nization is acquired and the OOFV (b6, E1-036H) will be set to ‘0’ for
indication. Then, this block goes on monitoring the received data
stream. If the received Basic Frame alignment signal does not meet its
pattern, the FERI (b2, E1-034H) will be set to ‘1’. The criteria of out of
Basic Frame synchronization are determined by the BIT2C (b6, E1-
031H). If one of the conditions set in the BIT2C (b6, E1-031H) is met,
the search process will restart when the REFRDIS (b0, E1-030H) is ‘0’.
Excessive CRC errors will also lead to re-searching for Basic Frame
(refer to Chapter 3.2.1.1.2 CRC Multi-Frame for details).
However, the Basic Frame synchronization can also be forced to
re-search for a new Basic Frame any time when there is a transition
from ‘0’ to ‘1’ on the REFR (b2, E1-030H).
3.2.1.1.2
CRC Multi-Frame
The CRC Multi-Frame is provided to enhance the ability of verifying
data stream. The structure of TS0 of CRC Multi-Frame is illustrated in
A CRC Multi-Frame consists of 16 continuous Basic Frames (No. 0
~ 15), which are numbered from a Basic Frame with FAS. Each CRC
Multi-Frame can be divided into two Sub Multi-Frames (SMF I & SMF II).
The first bit of TS0 of each frame is called International (Si) bit. The
Si bit in each even frame is the CRC bit. Thus, there are C1, C2, C3, C4
in each SMF. The C1 is the most significant bit, while the C4 is the least
significant bit. The Si bits in the first six odd frames are the CRC Multi-
Frame alignment pattern. The pattern is ‘001011’. The Si bits in Frame
13 and Frame 15 are E1 and E2 bits respectively. The E bits’ value indi-
cates the Far End Block Errors (FEBE).
After the Basic Frame has been synchronized, the Frame Proces-
sor initiates an 8 and 400ms timer to check the CRC Multi-Frame align-
ment signal if the CRCEN (b7, E1-030H) is ‘1’. The CRC Multi-Frame
synchronization is declared with a ‘0’ in the OOCMFV (b4, E1-036H)
only if at least two CRC Multi-Frame alignment patterns are found within
8ms, with the interval time of each pattern being a multiple of 2ms. Then
if the received CRC Multi-Frame alignment signal does not meet its pat-
tern, the CMFERI (b0, E1-034H) will be set to ‘1’. The Frame Processor
calculates the data in the SMF(N) per the algorithm in G.704 and G.706
to get a four-bit remainder, then compares the four-bit remainder with
the C1, C2, C3, C4 in the next SMF. If there is a difference between
them, bit errors exist in SMF(N) and a CRC error is counted. The
CRCERR[9:0] (b7~0, E1-039H & b1~0, E1-03AH) are used to indicate
the CRC error numbers and are updated every second. Once the
CRCERR[9:0] (b7~0, E1-039H & b1~0, E1-03AH) are updated, a ‘1’ will
be set in the NEWDATA (b6, E1-03AH) for indication. If the
CRCERR[9:0] are over-written, the OVR (b7, E1-03AH) will be asserted.
When more than 914 CRC errors occur in one second which is indicated
in the EXCRCERR (b0, E1-031H), a new search for the Basic Frame
alignment pattern will start if the REFCRCE (b1, E1-030H) is set to ‘1’
and the REFRDIS (b0, E1-030H) is set to ‘0’.
If the 2 CRC Multi-Frame alignment patterns can not be found
within 8ms with the interval time being a multiple of 2ms, an offline
search for the Basic Frame alignment pattern will start which is indicated
in the OOOFV (b3, E1-036H). The process is the same as shown in
Figure 4. This offline operation searches in parallel with the pre-found
Basic Frame synchronization searching process. After the new Basic
Frame synchronization is acquired by this offline search, the 8ms timer
is restarted to check whether the two CRC Multi-Frame alignment pat-
terns are found within 8ms, with the interval time of each pattern being a
multiple of 2ms again. If the condition can not be met, the procedure will
go on until the 400ms timer ends. If the condition still can not be met at
that time and the Basic Frame is still synchronized, the device declares
by the C2NCIWV (b7, E1-036) to run under the CRC to non-CRC inter-
working process. In this process, the CRC Multi-Frame alignment pat-
tern can still be searched if the C2NCIWCK (b5, E1-030H) is set to ‘1’.
STEP1: Search
for 7-bit Frame Alignment
Sequence (FAS) (X0011011)
in the N frame
STEP 2: Find logic 1 in the
2nd bit of TS0 of the (N+1) frame to ensure
that this is a non-frame alignment
sequence (NFAS)
STEP 3: Search for
the correct 7-bit FAS (X0011011)
in the TS0 in the (N+2)
frame
Yes
No (N=N+1)
Yes
Basic Frame
Synchronization Found
No
(N=N+3)
No (skip
one frame,
N=N+3)
th
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| IDT82V2108PXG | 功能描述:IC FRAMER T1/J1/E1 8CH 128-PQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱(chēng):Q6396337A |
| IDT82V2108PXG8 | 功能描述:IC FRAMER T1/J1/E1 8CH 128-PQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱(chēng):Q6396337A |
| IDT82V2604 | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:INVERSE MULTIPLEXING FOR ATM IDT82V2604 |
| IDT82V2604BB | 功能描述:IC INVERSE MUX 4CH ATM 208-BGA RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2 |
| IDT82V2604BBG | 功能描述:IC INVERSE MUX 4CH ATM 208-BGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2 |
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