參數(shù)資料
型號: ISP1583ET2
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, MO-195, SOT543-1,TFBGA-64
文件頁數(shù): 25/100頁
文件大?。?/td> 508K
代理商: ISP1583ET2
ISP1583_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
29 of 99
NXP Semiconductors
ISP1583
Hi-Speed USB peripheral controller
9.
Register description
Table 21.
Register overview
Name
Destination
Address Description
Size
(bytes)
Reference
Initialization registers
Address
device
00h
USB device address and enable
1
Mode
device
0Ch
power-down options, global interrupt
enable, SoftConnect
2
Interrupt Conguration
device
10h
interrupt sources, trigger mode,
output polarity
1
OTG
device
12h
OTG implementation
1
Interrupt Enable
device
14h
interrupt source enabling
4
Data ow registers
Endpoint Index
endpoints
2Ch
endpoint selection, data ow direction 1
Control Function
endpoint
28h
endpoint buffer management
1
Data Port
endpoint
20h
data access to endpoint FIFO
2
Buffer Length
endpoint
1Ch
packet size counter
2
Buffer Status
endpoint
1Eh
buffer status for each endpoint
1
Endpoint MaxPacketSize
endpoint
04h
maximum packet size
2
Endpoint Type
endpoint
08h
selects endpoint type: isochronous,
bulk or interrupt
2
DMA registers
DMA Command
DMA controller
30h
controls all DMA transfers
1
DMA Transfer Counter
DMA controller
34h
sets byte count for DMA transfer
4
DMA Conguration
DMA controller
38h
byte 0: sets GDMA conguration
(counter enable, data strobing, bus
width)
1
39h
byte 1: sets ATA conguration (IORDY
enable, mode selection: ATA, MDMA,
PIO)
1
DMA Hardware
DMA controller
3Ch
endian type, master or slave
selection, signal polarity for DACK,
DREQ, DIOW, DIOR, EOT
1
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ISP1583ET2,518 功能描述:外圍驅(qū)動器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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