參數(shù)資料
型號(hào): KSZ8851SNLI TR
廠商: Micrel Inc
文件頁數(shù): 18/80頁
文件大?。?/td> 0K
描述: IC ETHERNET CTLR 1PORT PCI 32MLF
標(biāo)準(zhǔn)包裝: 1
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應(yīng)商設(shè)備封裝: 32-MLF?(5x5)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
其它名稱: 576-3506-6
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
25
M9999-083109-2.0
for the frame to transmit. The second word is used to specify the total number of bytes of the frame. The packet data
follows. The packet data area holds the frame itself. It may or may not include the CRC checksum depending upon
whether hardware CRC checksum generation is enabled in TXCR (bit 1) register.
Multiple frames can be pipelined in both the transmit queue and receive queue as long as there is enough queue memory,
thus avoiding overrun. For each transmitted frame, the transmit status information for the frame is located in the TXSR
(0x72) register.
Packet Memory
Address Offset
Bit 15
Bit 0
2
nd Byte
1
st Byte
0
Control Word
2
Byte Count
4 - up
Transmit Packet Data
(maximum size is 2000)
Table 6. Frame Format for Transmit Queue
Since multiple packets can be pipelined into the TX packet memory for transmit, the transmit status reflects the status of
the packet that is currently being transferred on the MAC interface, which may or may not be the last queued packet in the
TX queue.
The transmit control word is the first 16-bit word in the TX packet memory, followed by a 16-bit byte count. It must be word
aligned. Each control word corresponds to one TX packet. Table 7 gives the transmit control word bit fields.
Bit
Description
15
TXIC Transmit Interrupt on Completion
When this bit is set, the KSZ8851SNL sets the transmit interrupt after the present frame has
been transmitted.
14-6
Reserved.
5-0
TXFID Transmit Frame ID
This field specifies the frame ID that is used to identify the frame and its associated status
information in the transmit status register.
Table 7. Transmit Control Word Bit Fields
The transmit Byte Count specifies the total number of bytes to be transmitted from the TXQ. Its format is given in Table 8.
Bit
Description
15-11
Reserved.
10-0
TXBC Transmit Byte Count
Transmit Byte Count. Hardware uses the byte count information to conserve the TX buffer
memory for better utilization of the packet memory.
Note: The hardware behavior is unknown if an incorrect byte count information is written to this
field. Writing a 0 value to this field is not permitted.
Table 8. Transmit Byte Count Format
The data area contains six bytes of Destination Address (DA) followed by six bytes of Source Address (SA), followed by a
variable-length number of bytes. On transmit, all bytes are provided by the CPU, including the source address. The
KSZ8851SNL does not insert its own SA. The 802.3 Frame Length word (Frame Type in Ethernet) is not interpreted by
the KSZ8851SNL. It is treated transparently as data both for transmit operations.
Frame Transmitting Path Operation in TXQ
This section describes the typical register settings for transmitting packets from host processor to KSZ8851SNL with
generic bus interface. User can use the default value for most of the transmit registers. The following Table 9 describes all
registers which need to be set and used for transmitting single or multiple frames.
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