參數(shù)資料
型號: KSZ8851SNLI TR
廠商: Micrel Inc
文件頁數(shù): 50/80頁
文件大?。?/td> 0K
描述: IC ETHERNET CTLR 1PORT PCI 32MLF
標(biāo)準(zhǔn)包裝: 1
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應(yīng)商設(shè)備封裝: 32-MLF?(5x5)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
其它名稱: 576-3506-6
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
54
M9999-083109-2.0
Bit
Default Value
R/W
Description
0
0x0
RW
RRXEF Release RX Error Frame
When this bit is written as 1, the current RX error frame buffer is released.
Note: This bit is self-clearing after the frame memory is released. The software should
wait for
the bit to be cleared before processing new RX frame.
TX Frame Data Pointer Register (0x84 – 0x85): TXFDPR
The value of this register determines the address to be accessed within the TXQ frame buffer. When the AUTO increment
is set, It will automatically increment the pointer value on write accesses to the data register.
The counter is incremented by one for every byte access, by two for every word access, and by four for every double
word access.
Bit
Default Value
R/W
Description
15
-
RO
Reserved
14
0x0
RW
TXFPAI TX Frame Data Pointer Auto Increment
When this bit is set, the TX Frame data pointer register increments automatically on
accesses to the data register. The increment is by one for every byte access, by two for
every word access, and by four for every doubleword access.
When this bit is reset, the TX frame data pointer is manually controlled by user to access
the TX frame location.
13-11
-
RO
Reserved
10-0
0x000
RO
TXFP TX Frame Pointer
TX Frame Pointer index to the Frame Data register for access.
This field reset to next available TX frame location when the TX Frame Data has been
enqueued through the TXQ command register.
RX Frame Data Pointer Register (0x86 – 0x87): RXFDPR
The value of this register determines the address to be accessed within the RXQ frame buffer. When the Auto Increment
is set, it will automatically increment the RXQ Pointer on read accesses to the data register.
The counter is incremented is by one for every byte access, by two for every word access, and by four for every double
word access.
Bit
Default Value
R/W
Description
15
-
RO
Reserved
14
0x0
RW
RXFPAI RX Frame Pointer Auto Increment
When this bit is set, the RXQ Address register increments automatically on accesses to
the data register. The increment is by one for every byte access, by two for every word
access, and by four for every double word access.
When this bit is reset, the RX frame data pointer is manually controlled by user to access
the RX frame location.
13-11
-
RO
Reserved
10-0
0x000
WO
RXFP RX Frame Pointer
RX Frame data pointer index to the Data register for access.
This pointer value must reset to 0x000 before each DMA operation from the host CPU to
read RXQ frame buffer.
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