參數(shù)資料
型號: KSZ8851SNLI TR
廠商: Micrel Inc
文件頁數(shù): 68/80頁
文件大小: 0K
描述: IC ETHERNET CTLR 1PORT PCI 32MLF
標(biāo)準(zhǔn)包裝: 1
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應(yīng)商設(shè)備封裝: 32-MLF?(5x5)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
其它名稱: 576-3506-6
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
70
M9999-083109-2.0
Offset
Counter Name
Description
0x1C
TxTotalCollision
Tx total collision, half duplex only
0x1D
TxExcessiveCollision
A count of frames for which Tx fails due to excessive collisions
0x1E
TxSingleCollision
Successfully Tx frames on a port for which Tx is inhibited by exactly one collision
0x1F
TxMultipleCollision
Successfully Tx frames on a port for which Tx is inhibited by more than one collision
Table 14. Port 1 MIB Counters Indirect Memory Offsets
Example:
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E)
Write to reg. IACR (0xC8) with 0x1C0E (set indirect address and trigger a read MIB counters operation)
Then
Read reg. IADHR (MIB counter value 31-16)
Read reg. IADLR (MIB counter value 15-0)
Additional MIB Information
In the heaviest condition, the byte counter will overflow in 2 minutes. It is recommended that the software read all
the counters at least every 30 seconds.
MIB counters are designed as “read clear”. That is, these counters will be cleared after they are read.
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參數(shù)描述
KSZ8851SNLTR 制造商:Micrel Inc 功能描述:
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KSZ8852HLEWA 功能描述:Ethernet Switch 10/100 Base-FX/T/TX PHY Ethernet Interface 64-LQFP (10x10) 制造商:microchip technology 系列:- 包裝:托盤 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開關(guān) 接口:以太網(wǎng) 標(biāo)準(zhǔn):10/100 Base-FX/T/TX PHY 電壓 - 電源:3.3V 電流 - 電源:- 工作溫度:-40°C ~ 115°C 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商器件封裝:64-LQFP(10x10) 標(biāo)準(zhǔn)包裝:160
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