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參數(shù)資料
| 型號： | KSZ8851SNLI TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 35/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ETHERNET CTLR 1PORT PCI 32MLF |
| 標準包裝： | 1 |
| 控制器類型： | 以太網(wǎng)控制器，MAC/PHY |
| 接口： | 總線 |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，32-MLF? |
| 供應(yīng)商設(shè)備封裝： | 32-MLF?（5x5） |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 1081 (CN2011-ZH PDF) |
| 其它名稱： | 576-3506-6 |
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Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
40
M9999-083109-2.0
Register Map: MAC, PHY and QMU
Do not write to bit values or to registers defined as Reserved. Manipulating reserved bits or registers causes
unpredictable and often fatal results. If the user wants to write to these reserved bits, the user has to read back these
reserved bits (RO or RW) first, then “OR” with the read value of the reserved bits and write back to these reserved bits.
Bit Type Definition
RO = Read only.
WO = Write only.
RW = Read/Write.
W1C = Write 1 to Clear (writing an “1” to clear this bit).
0x00 – 0x07: Reserved
Chip Configuration Register (0x08 – 0x09): CCR
This register indicates the chip configuration mode based on strapping and bonding options
Bit
Default Value
R/W
Description
15-10
-
RO
Reserved
9
-
RO
EEPROM presence
The EED_IO (pin 6) value is latched into this bit druing power-up/reset.
0: No external EEPROM, 1: Use external EEPROM.
8
-
RO
SPI bus mode
To indicate this is SPI interface for host
0: No, 1: Yes.
7-4
0x0
RO
Reserved
3
0
RO
Reserved
2
0
RO
Reserved
1
0
RO
Reserved
0
-
RO
32-Pin Chip Package
To indicate this device is KSZ8851SNL.
0: No, 1: Yes
0x0A – 0x0F: Reserved
Host MAC Address Registers: MARL, MARM and MARH
These Host MAC address registers are loaded starting at word location 0x1 of the EEPROM upon hardware reset. The
software driver can read or write these registers value, but it will not modify the original Host MAC address value in the
EEPROM. These six bytes of Host MAC address in external EEPROM are loaded to these three registers as mapping
below:
MARL[15:0] = EEPROM 0x1(MAC Byte 2 and 1)
MARM[15:0] = EEPROM 0x2(MAC Byte 4 and 3)
MARH[15:0] = EEPROM 0x3(MAC Byte 6 and 5)
The Host MAC address is used to define the individual destination address that the KSZ8851SNL responds to when
receiving frames. Network addresses are generally expressed in the form of 01:23:45:67:89:AB, where the bytes are
received from left to right, and the bits within each byte are received from right to left (LSB to MSB). For example, the
actual transmitted and received bits are on the order of 10000000 11000100 10100010 11100110 10010001 11010101.
These three registers value for Host MAC address 01:23:45:67:89:AB will be held as below:
MARL[15:0] = 0x89AB
MARM[15:0] = 0x4567
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851SNLTR | 制造商:Micrel Inc 功能描述: |
| KSZ8851SNL-TR | 功能描述:Ethernet Controller 10/100 Base-T/TX PHY SPI Interface 32-MLF? (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:控制器 接口:SPI 標準:10/100 Base-T/TX PHY 電壓 - 電源:1.8V，2.5V，3.3V 電流 - 電源:- 工作溫度:0°C ~ 70°C 封裝/外殼:32-VFQFN 裸露焊盤，32-MLF? 供應(yīng)商器件封裝:32-MLF?（5x5） 標準包裝:1 |
| KSZ8852HLE-EVAL | 功能描述:KSZ8852HLE - Interface, Ethernet Control Evaluation Board 制造商:microchip technology 系列:- 零件狀態(tài):有效 主要用途:接口，以太網(wǎng)控制 嵌入式:否 使用的 IC/零件:KSZ8852HLE 主要屬性:- 輔助屬性:- 所含物品:板 標準包裝:1 |
| KSZ8852HLEWA | 功能描述:Ethernet Switch 10/100 Base-FX/T/TX PHY Ethernet Interface 64-LQFP (10x10) 制造商:microchip technology 系列:- 包裝:托盤 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開關(guān) 接口:以太網(wǎng) 標準:10/100 Base-FX/T/TX PHY 電壓 - 電源:3.3V 電流 - 電源:- 工作溫度:-40°C ~ 115°C 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商器件封裝:64-LQFP（10x10） 標準包裝:160 |
| KSZ8852HLEYA | 功能描述:Ethernet Switch 10/100 Base-FX/T/TX PHY Ethernet Interface 64-LQFP (10x10) 制造商:microchip technology 系列:- 包裝:托盤 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開關(guān) 接口:以太網(wǎng) 標準:10/100 Base-FX/T/TX PHY 電壓 - 電源:3.3V 電流 - 電源:- 工作溫度:-40°C ~ 115°C 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商器件封裝:64-LQFP（10x10） 標準包裝:160 |
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