參數(shù)資料
型號: LAMXO640E-3TN144E
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 13/77頁
文件大?。?/td> 0K
描述: IC FPGA 640LUTS 144TQFP
標準包裝: 60
系列: LA-MachXO
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 4.9ns
電壓電源 - 內(nèi)部: 1.14 V ~ 1.26 V
宏單元數(shù): 320
輸入/輸出數(shù): 113
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
包裝: 托盤
2-17
Architecture
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
Table 2-8. I/O Support Device by Device
Table 2-9. Supported Input Standards
LA-MachXO256
LA-MachXO640
LA-MachXO1200
LA-MachXO2280
Number of I/O Banks
2488
Type of Input Buffers
Single-ended
(all I/O Banks)
Single-ended
(all I/O Banks)
Single-ended
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Types of Output Buffers
Single-ended buffers
with complementary
outputs (all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
Differential Output
Emulation Capability
All I/O Banks
PCI Support
No
Top side only
VCCIO (Typ.)
Input Standard
3.3V
2.5V
1.8V
1.5V
1.2V
Single Ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI
1
Differential Interfaces
BLVDS
2, LVDS2, LVPECL2, RSDS2
1. Top Banks of LA-MachXO1200 and LA-MachXO2280 devices only.
2. LA-MachXO1200 and LA-MachXO2280 devices only.
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