參數(shù)資料
型號: LAMXO640E-3TN144E
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 41/77頁
文件大小: 0K
描述: IC FPGA 640LUTS 144TQFP
標(biāo)準(zhǔn)包裝: 60
系列: LA-MachXO
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 4.9ns
電壓電源 - 內(nèi)部: 1.14 V ~ 1.26 V
宏單元數(shù): 320
輸入/輸出數(shù): 113
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
包裝: 托盤
4-2
Pinout Information
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
Pin Information Summary
Pin Type
LAMXO256C/E
LAMXO640C/E
100 TQFP
144 TQFP
256 ftBGA
Single Ended User I/O
78
74
113
159
Differential Pair User I/O
1
38
17
43
79
Muxed
6666
TAP
4444
Dedicated (Total Without Supplies)
5555
VCC
2244
VCCAUX
1122
VCCIO
Bank0
3224
Bank1
3224
Bank2
2
4
Bank3
2
4
GND
8
101218
NC
0
52
Single Ended/Differential I/O
per Bank
Bank0
41/20
18/5
29/10
42/21
Bank1
37/18
21/4
30/11
40/20
Bank2
14/2
24/9
36/18
Bank3
21/6
30/13
40/20
1. These devices support emulated LVDS outputs. LVDS inputs are not supported.
Pin Type
LAMXO1200E
LAMXO2280E
100 TQFP
144 TQFP
256 ftBGA
100 TQFP
144 TQFP
256 ftBGA
324 ftBGA
Single Ended User I/O
73
113
211
73
113
211
271
Differential Pair User I/O
1
27
48
105
30
47
105
134
Muxed
6666666
TAP
4444444
Dedicated (Total Without Supplies)
5555555
VCC
4442446
VCCAUX
2222222
VCCIO
Bank0
1121122
Bank1
1121122
Bank2
1121122
Bank3
1121122
Bank4
1121122
Bank5
1121122
Bank6
1121122
Bank7
1121122
GND
8
1218
8
121824
NC
0000000
Single Ended/Differential I/O
per Bank
Bank0
10/3
14/6
26/13
9/3
13/6
24/12
34/17
Bank1
8/2
15/7
28/14
9/3
16/7
30/15
36/18
Bank2
10/4
15/7
26/13
10/4
15/7
26/13
34/17
Bank3
11/5
15/7
28/14
11/5
15/7
28/14
34/17
Bank4
8/3
14/5
27/13
8/3
14/4
29/14
35/17
Bank5
5/2
10/4
22/11
5/2
10/4
20/10
30/15
Bank6
10/3
15/6
28/14
10/4
15/6
28/14
34/17
Bank7
11/5
15/6
26/13
11/5
15/6
26/13
34/17
1. These devices support on-chip LVDS buffers for left and right I/O Banks.
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