參數資料
型號: LAMXO640E-3TN144E
廠商: Lattice Semiconductor Corporation
文件頁數: 43/77頁
文件大?。?/td> 0K
描述: IC FPGA 640LUTS 144TQFP
標準包裝: 60
系列: LA-MachXO
可編程類型: 系統(tǒng)內可編程
最大延遲時間 tpd(1): 4.9ns
電壓電源 - 內部: 1.14 V ~ 1.26 V
宏單元數: 320
輸入/輸出數: 113
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應商設備封裝: 144-TQFP(20x20)
包裝: 托盤
4-4
Pinout Information
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
Power Supply and NC (Cont.)
Signal
256 ftBGA
1
324 ftBGA
1
VCC
G7, G10, K7, K10
F14, G11, G9, H7, L7, M9
VCCIO0
LAMXO640: F8, F7, F9, F10
LAMXO1200/2280: F8, F7
G8, G7
VCCIO1
LAMXO640: H11, G11, K11, J11
LAMXO1200/2280: F9, F10
G12, G10
VCCIO2
LAMXO640: L9, L10, L8, L7
LAMXO1200/2280: H11, G11
J12, H12
VCCIO3
LAMXO640: K6, J6, H6, G6
LAMXO1200/2280: K11, J11
L12, K12
VCCIO4
LAMXO640: None
LAMXO1200/2280: L9, L10
M12, M11
VCCIO5
LAMXO640: None
LAMXO1200/2280: L8, L7
M8, R9
VCCIO6
LAMXO640: None
LAMXO1200/2280: K6, J6
M7, K7
VCCIO7
LAMXO640: None
LAMXO1200/2280: H6, G6
H6, J7
VCCAUX
T9, A8
M10, F9
GND
2
A1, A16, F11, G8, G9, H7, H8, H9, H10, J7, J8, J9,
J10, K8, K9, L6, T1, T16
E14, F16, H10, H11, H8, H9, J10, J11, J4, J8, J9,
K10, K11, K17, K8, K9, L10, L11, L8, L9, N2, P14,
P5, R7
NC
3
LAMXO640: E4, E5, F5, F6, C3, C2, G4, G5, H4, H5,
K5, K4, M5, M4, P2, P3, N5, N6, M7, M8, N10, N11,
R15, R16, P15, P16, M11, L11, N12, N13, M13, M12,
K12, J12, F12, F13, E12, E13, D13, D14, B15, A15,
C14, B14, E11, E10, E7, E6, D4, D3, B3, B2
LAMXO1200: None
LAMXO2280: None
1. Pin orientation A1 starts from the upper left corner of the top side view with alphabetical order ascending vertically and numerical order ascending horizontally.
2. All grounds must be electrically connected at the board level. For fpBGA and ftBGA packages, the total number of GND balls is less than the actual number of
GND logic connections from the die to the common package GND plane.
3. NC pins should not be connected to any active signals, VCC or GND.
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