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參數(shù)資料
| 型號(hào)： | M58MR032C |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
| 中文描述： | 32兆位的2Mb x16插槽，復(fù)用的I / O，雙行，突發(fā)1.8V電源快閃記憶體 |
| 文件頁(yè)數(shù)： | 7/52頁(yè) |
| 文件大?。?/td> | 396K |
| 代理商： | M58MR032C |
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M58MR032C, M58MR032D
Table 4. User Bus Operations
(1)
Note: 1. X = Don’t care.
Table 5. Read Electronic Signature (AS and Read CFI instructions)
(1)
Note: 1. Addresses are latched on the rising edge of L input.
2. EA means Electronic Signature Address (see Read Electronic Signature)
3. Value during address latch.
Table 6. Read Block Protection (AS and Read CFI instructions)
(1)
Note: 1. Addresses are latched on the rising edge of L input.
2. A locked block can be unprotected only with WP at V
IH.
3. Value during address latch.
4. BA means Block Address. First cycle command address should indicate the bank of the block address.
Operation
E
G
W
L
RP
WP
ADQ15-ADQ0
Address Latch
V
IL
V
IH
V
IH
V
IL
(rising edge)
V
IH
V
IH
Address Input
Write
V
IL
V
IH
V
IL
V
IH
V
IH
V
IH
Data Input
Output Disable
V
IL
V
IH
V
IH
V
IH
V
IH
V
IH
Hi-Z
Standby
V
IH
X
X
X
V
IH
X
Hi-Z
Reset / Power-down
X
X
X
X
V
IL
X
Hi-Z
Block Locking
V
IL
X
X
X
V
IH
V
IL
X
Code
Device
E
G
W
ADQ1
(3)
ADQ0
(3)
Other
Address
(2)
ADQ15-0
Manufacturer Code
V
IL
V
IL
V
IH
V
IL
V
IL
EA
(2)
0020h
Device Code
M58MR032C
V
IL
V
IL
V
IH
V
IL
V
IH
EA
(2)
88DAh
M58MR032D
V
IL
V
IL
V
IH
V
IL
V
IH
EA
(2)
88DBh
Block Status
E
G
W
ADQ1
(3)
ADQ0
(3)
Other
Address
ADQ15-0
Protected and unlocked
V
IL
V
IL
V
IH
V
IH
V
IL
BA
(4)
0001
Unprotected and unlocked
V
IL
V
IL
V
IH
V
IH
V
IL
BA
(4)
0000
Protected and locked
V
IL
V
IL
V
IH
V
IH
V
IL
BA
(4)
0003
Unprotected and locked
(2)
V
IL
V
IL
V
IH
V
IH
V
IL
BA
(4)
0002
DEVICE OPERATIONS
The following operations can be performed using
the appropriate bus cycles: Address Latch, Read
Array (Random, and Page Modes), Write com-
mand, Output Disable, Standby, reset/Power-
down and Block Locking. See Table 4.
Address Latch.
In asynchronous operation, the
address is latched on the rising edge of L input. In
burst mode the address is latched either on the ris-
ing edge of L or on the first rising/falling edge of K
(depending on configuration settings) when L is
low.
Read.
Read operations are used to output the
contents of the Memory Array, the Electronic Sig-
nature, the Status Register, the CFI, the Block
Protection Status, the Read Configuration Regis-
ter status and the Protection Register.
Read operation of the Memory Array may be per-
formed in asynchronous page mode or synchro-
nous burst mode. In asynchronous page mode
data is internally read and stored in a page buffer.
The page has a size of 4 words and is addressed
by ADQ0 and ADQ1 address inputs.
According to the device configuration the following
Read operations: Electronic Signature - Status
Register - CFI - Block Protection Status - Read
Configuration Register Status - Protection Regis-
ter must be accessed as asynchronous read or as
single synchronous read (see Figure 4).
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| M58MR032C100ZC6T | 功能描述:閃存 32M (2Mx16) 100ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類(lèi)型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類(lèi)型: 接口類(lèi)型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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| M58MR032D | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58MR032D100ZC6T | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
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