Applications Information
MOTOROLA
MC68307 USER’S MANUAL
10-27
PAGE
*––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
*
OUTPUT PROCEDURE
*
INPUT:
D0.B = CHARACTER
*
OUTPUT: NONE
* CALLER ASSUMES CHARACTER IS 'LOGICALLY' WRITTEN AFTER THIS CALL
*––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
CON_OUT:
MOVE.B
#ENATX,CON_CR
;Enable transmitter
CON_OUT_1:
BTST.B
#TXRDY_BIT,CON_SR;Wait until
BEQ.S
CON_OUT_1
;transmitter ready
MOVE.B
D0,CON_TH
;Send char
RTS
END
10.5 SWAPPING ROM AND RAM MAPPING ON THE MC68307
It is often essential for embedded systems to locate the exception and interrupt vectors in
read/write memory, to allow vector table changes after system boot-up. Indeed, before
being able to port some debug monitors to an application this is a requirement.
For CPU32 based MC68300 integrated processors, the vector base register (VBR) resolves
this issue, permitting vectors to be located anywhere in the address space. For MC68300
processors with an M68000 processor core (MC68302, MC68306, MC68307, etc.) this fea-
ture is not available, and a ROM/RAM swap technique is necessary to exchange the usual
ROM at address $0 with RAM.
This section demonstrates a RAM/ROM swap mechanism specifically for the MC68307.
However, the method can be applied equally to the other M68000 core based members of
the MC68300 family.
10.5.1 Software Implementation
The swap mechanism relies on a section of position-independent code and careful repro-
4 provides full details of the code used.
Initially, the ROM and RAM chip selects reserve areas in the memory map at base address
$0 and address $200000 respectively. Thereafter, a swap code routine is copied from ROM
into RAM, before jumping to RAM to execute it. On completion, the execution returns to con-
tinue in ROM, which is now relocated at base address $080000. Finally, the RAM is then
relocated at base address $0 as required. The resulting memory map is shown in
Figure 10-