Signal Description
2-14
MC68307 USER’S MANUAL
MOTOROLA
The address and data bus also three-state at reset and during bus arbitration and power-
down mode. In this case the designer must decide whether a short period of floating values
on the bus is a concern. The internal pullups on the bidirectional data bus pins are not
sufficient to drive external levels. Again, adding pullups will help minimize power
consumption in low-power sleep mode.
Bidirectional I/O pins default to inputs on reset. If they are to be used as outputs later, or
their function changed to an alternate output function for the pin then a pullup or pulldown
may be required. One example is the CS2B, CS2C, and CS2D signals, multiplexed with port
A lines. If these chip-selects are used they should have pullups otherwise they will float from
reset until they are setup.
The RSTIN input can either be left floating or pulled up if the default power-on reset time is
required, or can have an external RC network to stretch reset time. Refer to Section 3.5
Reset Operation and Section 10.1 MC68307 Minimum Stand-Alone System Hardware
for details of use of this pin.
For maximum reliability, unused inputs should not be left floating. If they are input-only, they
may be pulled to VCC or ground. Unused outputs may be left unconnected. Unused I/O pins
may be configured as outputs after reset, and left unconnected.
If the MC68307 is to be held in reset for extended periods of time in an application (other
than what occurs in normal power-on reset or board test sequences) due to a special appli-
cation requirement (such as VCC dropping below required specifications, etc.) then three-
stated signals and inputs should be pulled up or down. This decreases stress on the device
transistors and saves power.
of all pins during reset.
Refer to Section 12 Ordering Information and Mechanical Data for details of pin assign-
ments.
2.12 SIGNAL INDEX
Table 2-11. Signal Index
Pin Name
Description of Pin Function(s)
Direction
TDO
Test Data Out
Output
TDI
Test Data In
Input
TMS
Test Mode Select
Input
TCK
Test Clock In
Input
D15–D0
Data Bus
Bidirectional
A23–A8
Address Bus Out
Output
A7–A0/AD7–AD0
Address Bus Out/Multiplexed 8051 Address/Data
Bidirectional
AS
Address Strobe
Output
UDS
Upper Data Strobe
Output
LDS
Lower Data Strobe
Output
R/W
Read/Write
Output