Monitor ROM (MON)
Data Sheet
MC68HC908SR12MC68HC08SR12 — Rev. 5.0
170
Monitor ROM (MON)
Freescale Semiconductor
If V
TST
is applied to IRQ1 and PTC1 is low upon monitor mode entry
(above condition set 1), the bus frequency is a divide-by-two of the input
clock. If PTC1 is high with V
TST
applied to IRQ1 upon monitor mode
entry, the bus frequency will be a divide-by-four of the input clock.
Holding the PTC1 pin low when entering monitor mode causes a bypass
of a divide-by-two stage at the oscillator only if V
TST
is applied to IRQ1.
In this event, the CGMOUT frequency is equal to the CGMXCLK
frequency, and the OSC1 input directly generates internal bus clocks. In
this case, the OSC1 signal must have a 50% duty cycle at maximum bus
frequency.
If entering monitor mode without high voltage on IRQ1 (above condition
set 2 or 3, where applied voltage is either V
DD
or V
SS
), then all port A pin
requirements and conditions, including the PTC1 frequency divisor
selection, are not in effect. This is to reduce circuit requirements when
performing in-circuit programming.
NOTE:
If the reset vector is blank and monitor mode is entered, the chip will see
an additional reset cycle after the initial POR reset. Once the part has
been programmed, the traditional method of applying a voltage, V
TST
, to
IRQ1 must be used to enter monitor mode.
The COP module is disabled in monitor mode based on these
conditions:
If monitor mode was entered as a result of the reset vector being
blank (above condition set 2 or 3), the COP is always disabled
regardless of the state of IRQ1 or RST.
If monitor mode was entered with V
TST
on IRQ1 (condition set 1),
then the COP is disabled as long as V
TST
is applied to either IRQ1
or RST.
The second condition states that as long as V
TST
is maintained on the
IRQ1 pin after entering monitor mode, or if V
TST
is applied to RST after
the initial reset to get into monitor mode (when V
TST
was applied to
IRQ1), then the COP will be disabled. In the latter situation, after V
TST
is
applied to the RST pin, V
TST
can be removed from the IRQ1 pin in the
interest of freeing the IRQ1 for normal functionality in monitor mode.