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TABLE OF CONTENTS (Continued)
Paragraph
Page
Number
Title
Number
Section 7
Serial Communications Interface
7.1
Overview and Features ................................................................................
7-1
7.1.1
SCI Two-wire System Features: .............................................................
7-1
7.1.2
SCI Receiver Features ...........................................................................
7-1
7.1.3
SCI Transmitter Features .......................................................................
7-2
7.2
Functional Description .................................................................................
7-2
7.3
Data Format .................................................................................................
7-4
7.4
Receiver Wake-up Operation .......................................................................
7-4
7.4.1
Idle Line Wake-up ..................................................................................
7-5
7.4.2
Address Mark Wake-up ..........................................................................
7-5
7.5
Receive Data (RXD) .....................................................................................
7-5
7.6
Start Bit Detection ........................................................................................
7-6
7.7
Transmit Data (TXD) ....................................................................................
7-8
7.8
SCI Registers ...............................................................................................
7-8
7.8.1
Serial Communications Data Register (SCDAT) ....................................
7-8
7.8.2
Serial Communications Control Register 1 (SCCR1) .............................
7-8
7.8.3
Serial Communications Control Register 2 (SCCR2) .............................
7-9
7.8.4
Serial Communications Status Register (SCSR) ...................................
7-11
7.8.5
Baud Rate Register (BAUD) ...................................................................
7-12
Section 8
Serial Peripheral Interface
8.1
Overview and Features ................................................................................
8-1
8.2
SPI Signal Descriptions ...............................................................................
8-1
8.2.1
Master In Slave Out (MISO) ...................................................................
8-2
8.2.2
Master Out Slave In (MOSI) ...................................................................
8-2
8.2.3
Serial Clock (SCK) .................................................................................
8-2
8.2.4
Slave Select (SS) ...................................................................................
8-3
8.3
Functional Description .................................................................................
8-4
8.4
SPI Registers ...............................................................................................
8-5
8.4.1
Control Register (SPCR) ........................................................................
8-5
8.4.2
Status Register (SPSR) ..........................................................................
8-7
8.4.3
Data I/O Register (SPDAT) ....................................................................
8-8
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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