![](http://datasheet.mmic.net.cn/120000/MC68HC711G5CFN_datasheet_3559545/MC68HC711G5CFN_15.png)
LIST OF TABLES (Continued)
Paragraph
Page
Number
Title
Number
xiii
2-1
Mode Select Summary .................................................................................
2-1
2-2
Bootstrap Mode Jump Vectors .....................................................................
2-3
Port Signal Functions: (a) Expanded Non-multiplexed and Test Modes .....
2-9
2-3
Port Signal Functions: (b) Single Chip and Bootstrap Modes ......................
2-9
5-1
COP Timeout Periods ..................................................................................
5-2
Interrupt Vector Masks and Assignments ....................................................
5-7
5-3
Special Mode Select and Mode Select A Table ...........................................
5-15
5-4
Priority Select Bits Table ..............................................................................
5-16
6-1
Real Time Interrupt Rates ............................................................................
6-20
7-1
First Prescaler Stage ...................................................................................
7-14
7-2
Second Prescaler Stage ..............................................................................
7-14
8-1
SPI Rate Selection .......................................................................................
8-7
9-1
Channel Assignments ..................................................................................
9-2
9-1
Channel Assignments (continued) ...............................................................
9-3
12-1
Loads, Stores and Transfers ........................................................................
12-5
12-2
Arithmetic Operations ..................................................................................
12-6
12-3
Multiply and Divide .......................................................................................
12-7
12-4
Logical Operations .......................................................................................
12-7
12-5
Data Testing and Bit Manipulation ...............................................................
12-8
12-6
Shifts and Rotates ........................................................................................
12-9
12-7
Stack And Index Register Instructions .........................................................
12-10
12-8
Condition Code Register Instructions ..........................................................
12-11
12-9
Branches ......................................................................................................
12-13
12-10
Jumps ...........................................................................................................
12-14
12-11
Subroutine Calls and Returns (BSR, JSR, RTS) .........................................
12-14
12-12
Interrupt Handling (RTI, SWI, WAI) ..............................................................
12-14
13.1
Clock Input (Required Limit) ........................................................................
13-22
13.2
Clock Input (Guaranteed Limit) ....................................................................
13-22
13.3
Clock Gate Input (Guaranteed Limit) ...........................................................
13-23
B-1
Operations in PROG Mode ..........................................................................
B-4
LIST OF TABLES
Page
Number
Title
Number
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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