參數(shù)資料
型號: MCIMX258CVM4
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝: 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù): 116/154頁
文件大小: 1498K
代理商: MCIMX258CVM4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
64
Freescale Semiconductor
3.7.6.1.3
DDR2 SDRAM–Specific Parameters
The following diagrams and tables specify timing related to the SDRAMC module, which interfaces with
DDR2 SDRAM.
Figure 31. DDR2 SDRAM Basic Timing Parameters
Table 50 provides values for a command/address slew rate of 1 V/ns and an SDCLK, SDCLK_B
differential slew rate of 2 V/ns. For additional values, use Table 51, “tlS, tlH Derating Values for
DDR2-400, DDR2-533.”
Table 50. DDR2 SDRAM Timing Parameter Table
ID
Parameter
Symbol
DDR2-400
Unit
Min.
Max.
DDR1
SDRAM clock high-level width
tCH
0.45
0.55
tCK
DDR2
SDRAM clock low-level width
tCL
0.45
0.55
tCK
DDR3
SDRAM clock cycle time
tCK
7.5
8
ns
SDCLK
WE
ADDR
ROW/BA
COL/BA
CS
CAS
RAS
DDR1
DDR3
DDR2
DDR4
DDR5
DDR6
DDR7
SDCLK
CKE
DDR4
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