參數(shù)資料
型號： MCIMX258CVM4
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝： 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù)： 132/154頁
文件大?。?/td> 1498K
代理商： MCIMX258CVM4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Freescale Semiconductor
79
Note:
All configuration parameters (CSA,CSN,WBEA,WBEN,LBA,LBN,OEN,OEA,RBEA & RBEN) are in cycle units.
WE40A
(muxed
A/D)
CS[x] Valid to LBA Invalid
WE14 – WE6 + (LBN + LBA + 1
– CSA)
–3 + (LBN + LBA +
1 – CSA)
3 + (LBN + LBA + 1 –
CSA)
ns
WE41
CS[x] Valid to Output Data Valid
WE16 – WE6 – WCSA
—
3 – WCSA
ns
WE41A
(muxed
A/D)
CS[x] Valid to Output Data Valid
WE16 – WE6 + (WLBN +
WLBA + ADH + 1 – WCSA)
—
3 + (WLBN + WLBA +
ADH + 1 – WCSA)
ns
WE42
Output Data Invalid to CS[x]
Invalid
WE17 – WE7 – CSN
—
3 – CSN
ns
WE43
Input Data Valid to CS[x]
Invalid
MAXCO – MAXCSO + MAXDI
MAXCO6 –
MAXCSO7 +
MAXDI8
—ns
WE44
CS[x] Invalid to Input Data
invalid
00
—
ns
WE45
CS[x] Valid to EB[y] Valid
(Write access)
WE12 – WE6 + (WBEA – CSA)
—
3 + (WBEA – CSA)
ns
WE46
EB[y] Invalid to CS[x] Invalid
(Write access)
WE7 – WE13 + (WBEN – CSN)
—
–3 + (WBEN – CSN)
ns
WE47
DTACK Valid to CS[x] Invalid
MAXCO – MAXCSO + MAXDTI
MAXCO6 –
MAXCSO7Note:Not
e: + MAXDTI9
—ns
WE48
CS[x] Invalid to DTACK invalid
0
—
ns
1 For the value of parameters WE4–WE21, see column BCD = 0 in Table 56.
2 CS Assertion. This bit field determines when the CS signal is asserted during read/write cycles.
3 CS Negation. This bit field determines when the CS signal is negated during read/write cycles.
4 BE Assertion. This bit field determines when the BE signal is asserted during read cycles.
5 BE Negation. This bit field determines when the BE signal is negated during read cycles.
6 Output maximum delay from internal driving ADDR/control FFs to chip outputs.
7 Output maximum delay from CS[x] internal driving FFs to CS[x] out.
8 DATA maximum delay from chip input data to its internal FF.
9
DTACK maximum delay from chip dtack input to its internal FF.
Table 57. WEIM Asynchronous Timing Parameters Relative to Chip Select Table (continued)
Ref No.
Parameter
Determination By
Synchronous Measured
Parameters1
Min
Max
(If 133 MHz is
supported by SoC)
Unit
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參數(shù)描述
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