參數(shù)資料
型號: MCIMX258CVM4
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝: 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù): 84/154頁
文件大?。?/td> 1498K
代理商: MCIMX258CVM4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Freescale Semiconductor
35
Note:
1. Maximum condition for tpr, tpo, tpi, and tpv: wcs model, 1.1 V, I/O 1.65 V, and 105 °C. Minimum condition for tpr, tpo, and tpv:
bcs model, 1.3 V, I/O 1.95 V and –40 °C. Input transition time from core is 1 ns (20%–80%).
2. Minimum condition for tps: wcs model, 1.1 V, I/O 1.65 V, and 105 °C. tps is measured between VIL to VIH for rising edge and
between VIH to VIL for falling edge.
3. Maximum condition for tdit: bcs model, 1.3 V, I/O 1.95 V, and –40 °C.
4. Maximum condition for tpi and trfi: wcs model, 1.1 V, I/O 1.65 V and 105 °C. Minimum condition for tpi and trfi: bcs model, 1.3 V,
I/O 1.95 V and –40 °C. Input transition time from pad is 5 ns (20%–80%).
Table 25 shows the AC parameters for mobile DDR pbijtov18_33_ddr_clk I/O.
Table 25. AC Parameters for Mobile DDR pbijtov18_33_ddr_clk I/O
Parameter
Symbol
Load
Condition
Min.
Rise/Fall
Typ.
Max.
Rise/Fall
Units
Notes
Duty cycle
Fduty
40
50
60
%
Clock frequency
f
133
MHz
1
Output pad transition times (max. drive)
tpr
25 pF
50 pF
0.52/0.51
0.98/0.96
0.79/0.72
1.49/1.34
1.25/1.09
2.31/1.98
ns
1
Output pad transition times (high drive)
tpr
25 pF
50 pF
1.13/1.10
2.15/2.10
1.74/1.55
3.28/2.92
2.71/2.30
5.11/4.31
ns
Output pad transition times (standard drive)
tpr
25 pF
50 pF
2.26/2.19
4.30/4.18
3.46/3.07
6.59/5.79
5.39/4.56
10.13/8.55
ns
Output pad propagation delay (max. drive),
50%–50% input signals and crossing of
output signals
tpo
15 pF
35 pF
1.28/1.19
1.56/1.47
1.97/1.83
2.37/2.23
2.98/2.78
3.57/3.37
ns
1
Output pad propagation delay (high drive),
50%–50% input signals and crossing of
output signals
tpo
15 pF
35 pF
1.54/1.43
2.14/2.04
2.34/2.20
3.22/3.08
3.54/3.33
4.85/4.65
ns
Output pad propagation delay (standard
drive), 50%–50% input signals and crossing
of output signals
tpo
15 pF
35 pF
2.05/1.94
3.27/3.16
3.11/2.96
4.86/4.72
4.70/4.50
7.33/7.12
ns
Output pad propagation delay (max. drive),
40%–60% input signals and crossing of
output signals
tpo
15 pF
35 pF
1.45/1.36
1.73/1.64
2.13/2.00
2.53/2.40
3.14/2.94
3.74/3.54
ns
1
Output pad propagation delay (high drive),
40%–60% input signals and crossing of
output signals
tpo
15 pF
35 pF
1.70/1.60
2.31/2.21
2.51/2.37
3.38/3.24
3.70/3.50
5.02/4.82
ns
Output pad propagation delay (standard
drive), 40%–60% input signals and crossing
of output signals
tpo
15 pF
35 pF
2.22/2.11
3.43/3.32
3.27/3.13
5.02/4.88
4.87/4.66
7.49/7.29
ns
Output enable to output valid delay (max.
drive), 50%–50%
tpv
15 pF
35 pF
1.16/1.12
1.42/1.41
1.91/1.81
2.31/2.20
3.10/2.89
3.72/3.47
ns
1
Output enable to output valid delay (high
drive), 50%–50%
tpv
15 pF
35 pF
1.39/1.39
1.98/2.02
2.28/2.18
3.18/3.04
3.69/3.43
5.08/4.69
ns
Output enable to output valid delay
(standard drive), 50%–50%
tpv
15 pF
35 pF
1.90/1.94
3.07/3.20
3.09/2.94
4.88/4.66
4.95/4.55
7.73/7.05
ns
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