參數(shù)資料
型號: MCIMX258CVM4
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝: 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù): 85/154頁
文件大?。?/td> 1498K
代理商: MCIMX258CVM4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
36
Freescale Semiconductor
Note:
1. Maximum condition for tpr, tpo, tpi, and tpv: wcs model, 1.1 V, I/O 1.65 V, and 105 °C. Minimum condition for tpr, tpo, and tpv:
bcs model, 1.3 V, I/O 1.95 V and –40 °C. Input transition time from core is 1 ns (20%–80%).
2. Minimum condition for tps: wcs model, 1.1 V, I/O 1.65 V, and 105 °C. tps is measured between VIL to VIH for rising edge and
between VIH to VIL for falling edge.
3. Maximum condition for tdit: bcs model, 1.3 V, I/O 1.95 V, and –40 °C.
4. Maximum condition for tpi and trfi: wcs model, 1.1 V, I/O 1.65 V and 105 °C. Minimum condition for tpi and trfi: bcs model, 1.3 V,
I/O 1.95 V and –40 °C. Input transition time from pad is 5 ns (20%–80%).
Table 26 shows the AC requirements for mobile DDR I/O.
Output enable to output valid delay (max.
drive), 40%–60%
tpv
15 pF
35 pF
1.28/1.24
1.49/1.47
2.00/1.90
2.32/2.21
3.14/2.93
3.64/3.41
ns
1
Output enable to output valid delay (high
drive), 40%–60%
tpv
15 pF
35 pF
1.45/1.44
1.92/1.95
2.28/2.19
2.99/2.87
3.60/3.36
4.69/4.36
ns
Output enable to output valid delay
(standard drive), 40%–60%
tpv
15 pF
35 pF
1.85/1.88
2.78/2.88
2.92/2.79
4.34/4.16
4.5894.25
6.79/6.24
ns
Output pad slew rate (max. drive)
tps
25 pF
50 pF
0.37/0.45
0.30/0.36
0.64/0.79
0.52/0.61
1.14/1.36
0.90/1.02
V/ns
2
Output pad slew rate (high drive)
tps
25 pF
50 pF
0.30/0.37
0.21/0.25
0.51/0.63
0.36/0.42
091/1.06
0.63/0.67
V/ns
Output pad slew rate (standard drive)
tps
25 pF
50 pF
0.22/0.26
0.13/0.16
0.37/0.44
0.23/0.26
0.65/0.72
0.39/0.40
V/ns
Output pad dI/dt (max. drive)
tdit
25 pF
50 pF
65
70
171
183
426
450
mA/ns
3
Output pad dI/dt (high drive)
tdit
25 pF
50 pF
31
33
82
87
233
245
mA/ns
Output pad dI/dt (standard drive)
tdit
25 pF
50 pF
16
17
43
46
115
120
mA/ns
Input pad transition times
trfi
1.0 pF
0.07/0.08
0.11/0.13
0.16/0.20
ns
4
Input pad propagation delay, 50%–50%
tpi
1.0 pF
0.84/0.84
1.40/1.34
2.25/2.16
ns
Input pad propagation delay, 40%–60%
tpi
1.0 pF
1.66/1.66
2.22/2.16
3.06/2.97
ns
Table 26. AC Requirements for Mobile DDR I/O
Parameter
Symbol
Min.
Max.
Units
AC input logic high
VIH(ac)
0.8
× OVDD
OVDD+0.3
V
AC input logic low
VIL(ac)
–0.3
0.2
× OVDD
V
AC differential input voltage
Vid(ac)
0.6
× OVDD
OVDD+0.6
V
AC differential cross point voltage for input
Vix(ac)
0.4
× OVDD
OVDD+0.6
V
Table 25. AC Parameters for Mobile DDR pbijtov18_33_ddr_clk I/O (continued)
Parameter
Symbol
Load
Condition
Min.
Rise/Fall
Typ.
Max.
Rise/Fall
Units
Notes
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