參數(shù)資料
型號: MCIMX31
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應(yīng)用處理器
文件頁數(shù): 140/170頁
文件大小: 1562K
代理商: MCIMX31
i.MX31/i.MX31L Advance Information, Rev. 1.4
140
Freescale Semiconductor
Preliminary
Electrical Characteristics
5. RST must remain High for at least 40000 clock cycles after T1 and a response must be received
on RX between 400 and 40000 clock cycles after T1.
Figure 77. Active-Low-Reset Card Reset Sequence
4.3.20.3
Power Down Sequence
Power down sequence for SIM interface is as follows:
1. SIMPD port detects the removal of the SIM Card
2. RST goes Low
3. CLK goes Low
4. TX goes Low
5. VEN goes Low
Each of this steps is done in one CKIL period (usually 32 kHz). Power down can be started because of a
SIM Card removal detection or launched by the processor.
Figure 78
and
Table 59
show the usual timing
requirements for this sequence, with Fckil = CKIL frequency value.
SVEN
CLK
RX
2
T0
1
response
RST
T1
1
2
< 200 clock cycles
< 40000 clock cycles
400 clock cycles <
3
3
3
400000 clock cycles <
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