- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359154 > MCIMX31 (飛思卡爾半導(dǎo)體(中國)有限公司) Multimedia Applications Processors PDF資料下載
參數(shù)資料
| 型號(hào)： | MCIMX31 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Multimedia Applications Processors |
| 中文描述： | 多媒體應(yīng)用處理器 |
| 文件頁數(shù)： | 8/170頁 |
| 文件大小： | 1562K |
| 代理商： | MCIMX31 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁
i.MX31/i.MX31L Advance Information, Rev. 1.4
8
Freescale Semiconductor
Preliminary
Functional Description and Application Information
2.3
Module Descriptions
This section provides a brief text description of all the modules included in the i.MX31 and i.MX31L,
arranged in alphabetical order.
2.3.1
1-Wire
The 1-Wire module provides bi-directional communication between the ARM11 core and the
Add-Only-Memory EPROM (DS2502). The 1-Kbit EPROM is used to hold information about battery and
communicates with the ARM11 platform using the IP interface. The ARM11 (through the 1-Wire
interface) acts as the bus master and the DS2502 device is the slave. The 1-Wire peripheral does not trigger
interrupts; hence it is necessary for the ARM11 to poll of the 1-Wire to manage the module. The 1-Wire
uses an external pin(to connect to the DS2502. Timing requirements are met in hardware with the help of
a 1 MHz clock. The clock divider generates a 1 MHz clock that is used as time reference by the state
machine. Timing requirements are crucial for proper operation, and the 1-Wire state machine and the
internal clock provide the necessary signal. The clock must configured to approximately 1 MHz. You can
then set the 1-Wire register to send and receive bits over the 1-Wire bus.
2.3.2
Advanced Technology Attachment (ATA)
The ATA block provides an AT attachment host interface for the i.MX31 and i.MX31L. Its main use is to
provide an interface with IDE hard disc drives and ATAPI optical disc drives. It interfaces with the ATA
device using industry standard ATA signals. The ATA interface is compliant to the ATA standard, and
supports following ATA standard protocols:
PIO modes 0, 1, 2, 3, and 4
Multiword DMA modes 0, 1, and 2
Ultra DMA modes 0, 1, 2, 3, and 4 with a bus clock of 50 MHz or higher
Ultra DMA mode 5 with bus clock of 80 MHz or higher
The ATA interface has two busses connected to it. The CPU bus provides communication with the ARM11
host processor and the DMA bus provides communication between the ATA module and the host DMA
unit. All internal ATA registers are visible from both busses, allowing enhanced DMA access to program
the interface.
There are basically two protocols that can be active at the same time on the ATA bus. The first and simplest
protocol (PIO mode access) can be started at any time by either the ARM11 or the host-enhanced DMA to
the ATA bus. The PIO mode is a slow protocol, mainly intended to be used to program an ATA disc drive,
but also possible to use to transfer data to/from the disc drive.
The second protocol is the DMA mode access. DMA mode is started by the ATA interface after receiving
a DMA request from the drive, and only if the ATA interface has been programmed to accept the DMA
request. In DMA mode, either multiword DMA or ultra DMA protocol is used on the ATA bus. All
transfers between FIFO and host IP or DMA IP bus are zero wait states transfer, so high speed transfer
between FIFO and DMA/host bus is possible.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCL245 | SILICON EPITAXIAL PLANAR DIODE |
| MCL908QT1 | M68HC08 Microcontrollers |
| MCM63R836 | MCM63R836 |
| MCN51-30S3-PFA | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| MCN51-30S3-DS | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCIMX31_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processors |
| MCIMX31_08 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processors |
| MCIMX31_09 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processors |
| MCIMX31ADSE | 功能描述:KIT DEV ADS I.MX31 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| MCIMX31ADSE/C | 功能描述:開發(fā)板和工具包 - ARM I.MX31 APP DEV SYS RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。