參數(shù)資料
型號: MCIMX514AJM6C
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA529
封裝: 19 X 19 MM, 0.8 MM PITCH, ROHS COMPLIANT, BGA-529
文件頁數(shù): 86/172頁
文件大?。?/td> 2218K
代理商: MCIMX514AJM6C
i.MX51A Automotive and Infotainment Applications Processors, Rev. 4
20
Freescale Semiconductor
Electrical Characteristics
Table 16 shows the current core consumption (not including I/O) of the i.MX51.
1 The read current of approximately 5 mA is derived from the DDR supply (NVCC_EMI_DRAM).
2 The current I
program is only required during program time.
Table 16. i.MX51 Stop Mode Current and Power Consumption
Mode
Condition
Supply
Nominal
Unit
Stop Mode
External reference clocks
gated
Power gating for ARM and
processing units
Stop mode voltage
VDDGP = 0.95 V, VCC = 0.95 V, VDDA = 0.95 V
ARM CORE in SRPG mode
L1 and L2 caches power gated
IPU in S&RPG mode
VPU and GPU in PG mode
All PLLs off, all CCM-generated clocks off
CKIL input on with 32 kHz signal present
All modules disabled
USBPHY PLL off
External (MHz) crystal and on-chip oscillator
powered down (SBYOS bit asserted)
No external resistive loads that cause current flow
Standby voltage allowed (VSTBY bit is asserted)
TA = 25
°C
VDDGP
0.18
mA
VCC
0.35
VDDA
0.15
NVCC_OSC
0.012
Total
0.66
mW
Stop Mode
External reference clocks
gated
Power gating for ARM and
processing units
HPM voltage
VDDGP = 1.0 V, VCC = 1.225 V, VDDA = 1.2 V
ARM CORE in SRPG mode
L1 and L2 caches power gated
IPU in S&RPG mode
VPU and GPU in PG mode
All PLLs off, all CCM-generated clocks off
CKIL input on with 32 kHz signal present
All modules disabled.
USBPHY PLL off
External (MHz) crystal and on-chip oscillator
powered down (SBYOS bit asserted)
No external resistive loads that cause current flow
TA = 25
°C
VDDGP
0.24
mA
VCC
0.45
VDDA
0.2
NVCC_OSC
0.012
Total
1.09
mW
Stop Mode
External reference clocks
enabled
Power gating for ARM and
processing units
HPM voltage
VDDGP = 1.0 V, VCC = 1.225 V, VDDA = 1.20 V
ARM CORE in SRPG mode
L1 and L2 caches power gated
IPU in S&RPG mode
VPU and GPU in PG mode
All PLLs off, all CCM-generated clocks off
CKIL input on with 32 kHz signal present
All modules disabled
USBPHY PLL off
External (MHz) crystal and on-chip oscillator pow-
ered and generating reference clock
No external resistive loads that cause current flow
TA = 25
°C
VDDGP
0.24
mA
VCC
0.45
VDDA
0.2
NVCC_OSC
1.5
Total
4.8
mW
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MCIMX515DJM8C 制造商:Freescale Semiconductor 功能描述:; LEADED PROCESS COMPATIBLE:YES; PEAK RE