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參數(shù)資料
| 型號： | MCZ33742EG |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 元件分類： | CAN |
| 英文描述： | System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver |
| 中文描述： | 系統(tǒng)基礎(chǔ)芯片的增強型（SBC）的高速CAN收發(fā)器 |
| 文件頁數(shù)： | 53/65頁 |
| 文件大?。?/td> | 1158K |
| 代理商： | MCZ33742EG |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
53
33742
TYPICAL APPLICATIONS
VOLTAGE REGULATOR
The SBC contains two 5.0 V regulators: a V1 regulator,
fully integrated and protected, and a V2 regulator, which
operates with an external ballast transistor.
VDD REGULATOR
The VDD regulator provides 5.0 V output, 2.0% accuracy
with current capability of 200 mA max. It requires external
decoupling and stabilizing capacitors. The minimum
recommended values are as follows:
C4: 100 nF
C3: 10
μ
F < C3 <22
μ
F, ESR < 1.0
or
C3: 22
μ
F < C3 <47
μ
F, ESR < 5.0
or
C3:
≥
47
μ
F, ESR < 10
V2 REGULATOR: OPERATING WITH EXTERNAL
BALLAST TRANSISTOR
The V2 regulator is a tracking regulator of the VDD output.
Its accuracy relative to VDD is ±1.0%. It requires external
decoupling and stabilizing capacitors.
The recommended value are as follows:
22
μ
F, ESR < 5.0
47
μ
F, ESR < 10
The V2 pin has two functions: it is a sense input for the V2
regulator and is a 5.0 V power supply input to the CAN
interface.
With respect to ballast transistor selection, either PNP or
PMOS transistors may be used. A resistor between base and
emitter (or source and drain) is necessary to ensure proper
operation and optimized performances. Recommended
bipolar transistor is MJD32C.
V2 REGULATOR: OPERATION WITHOUT
BALLAST TRANSISTOR
The external ballast transistor is optional. If the application
does not requires more than the maximum output current
capability of the VDD regulator, then the ballast transistor can
be omitted. The thermal aspects must be analyzed as well.
The electrical connection is illustrated in Figure 32.
Figure 32. V2 Regulator Electrical Connection
FAILURE ON VDD, WDOG, RESET, AND INT PINS
The paragraphs below describe the behavior of the device
and of the INT, RST, and WDOG pins at power-up and under
failure of the VDD regulator.
POWER-UP AND SBC ENTERING NORMAL
OPERATION
After power-up the 33742 enters Normal Request mode
(CAN interface is in TXRX mode): VDD is on and V2 is off.
After 350 ms if no watchdog is written (no TIM1 register
write), a reset occurs and the 33742 returns to Normal
Request mode. During this sequence WDOG is active (low
level).
Once watchdog is written, the 33742 goes to Normal
mode: VDD is still on and V2 turns on, WDOG is no longer
active, and the RST pin is HIGH. If watchdog is not refreshed,
the 33742 generates a reset and returns to Normal Request
mode. Figure 33, page 54, illustrates the operation.
VDD
VSUP
V2CTRL
RST
C3
C4
C1
C2
V
DD
RESET
33742
V2
No Connect
Components List
C1: 22
μ
F
C2: 100 nF
C3: >10
μ
F
C4: 100 nF
MCU
V
PWR
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| MCZ33742EGR2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-E-HS-CAN RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33742SEG | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-E-HS-CAN RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33742SEGR2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-E-HS-CAN RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33780EG | 功能描述:多路器開關(guān) IC DBUS MASTER RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關(guān)閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| MCZ33780EG | 制造商:Freescale Semiconductor 功能描述:DUAL DBUS MASTER INTERFACE 16SOIC |
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