參數(shù)資料
型號(hào)： MJ80C31U-36:D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER
文件頁(yè)數(shù)： 100/101頁(yè)
文件大?。?/td> 3398K
121
8168C-MCU Wireless-02/10
AT86RF212
Table 7-29. CLKM Clock Rate Update Scheme
Register Bit
Value
Description
0
CLKM clock rate change appears immediately
CLKM_SHA_SEL
1
CLKM clock rate change appears after SLEEP cycle
Bit 2:0 – CLKM_CTRL
These register bits set the clock rate of pin 17 (CLKM).
Table 7-30. Clock Rate Setting at Pin CLKM
Register Bits
Value
Description
0
No clock at pin 17 (CLKM); pin set to logic low
1
1 MHz
2
2 MHz
3
4 MHz
4
8 MHz
5
16 MHz
6
250 kHz
IEEE 802.15.4 symbol rate frequencies
BPSK_OQPSK
(1)
SUB_MODE
(1)
Frequency
0
20 kHz
0
1
40 kHz
1
0
25 kHz
CLKM_CTRL
7
1
62.5 kHz
Note:
1. Refer to section 7.1.5
Register 0x12 (XOSC_CTRL):
The register XOSC_CTRL configures the crystal oscillator.
Table 7-31. Register 0x12 (XOSC_CTRL)
Bit
7
6
5
4
Name
XTAL_MODE[3]
XTAL_MODE[2]
XTAL_MODE[1]
XTAL_MODE[0]
Read/Write
R/W
Reset Value
1
Bit
3
2
1
0
Name
XTAL_TRIM[3]
XTAL_TRIM[2]
XTAL_TRIM[1]
XTAL_TRIM[0]
Read/Write
R/W
Reset Value
0
Bit 7:4 – XTAL_MODE
These register bits set the operating mode of the crystal oscillator, see Table 7-32.
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