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參數(shù)資料
| 型號(hào)： | MPC2605ZP66R |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | Integrated Secondary Cache for PowerPC Microprocessors |
| 中文描述： | 32K X 72 CACHE TAG SRAM, 8.5 ns, PBGA241 |
| 封裝： | PLASTIC, BGA-241 |
| 文件頁(yè)數(shù)： | 26/30頁(yè) |
| 文件大?。?/td> | 288K |
| 代理商： | MPC2605ZP66R |
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MPC2605
26
MOTOROLA
SHIFT–DR
EXIT1–IR
SELECT IR–SCAN
PAUSE–IR
TEST–LOGIC
RESET
EXIT1–DR
UPDATE–IR
CAPTURE–IR
SHIFT–IR
EXIT2–IR
0
RUN–TEST/
IDLE
1
UPDATE–DR
EXIT2–DR
PAUSE 1–DR
CAPTURE–DR
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
SELECT DR–SCAN
0
NOTE: The value adjacent to each state transition represents the signal present at TMS at the rising edge of TCK.
Figure 11. TAP Controller State Diagram
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