參數資料
型號: MPC5606SVLU6R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176
封裝: 24 X 24 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, MS-026BGA, LQFP-176
文件頁數: 46/136頁
文件大?。?/td> 858K
代理商: MPC5606SVLU6R
MPC5606S Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
17
1.6.17
FlexCAN
The MPC5606S MCU contains two controller area network (FlexCAN) modules. The FlexCAN module is a communication
controller implementing the CAN protocol according to Bosch Specification version 2.0B. The CAN protocol was designed to
be used primarily as a vehicle serial data bus, meeting the specific requirements of this field: real-time processing, reliable
operation in the EMI environment of a vehicle, cost-effectiveness and required bandwidth.
The FlexCan modules offer the following:
Compliant with CAN protocol specification, Version 2.0B active
64 mailboxes, each configurable as transmit or receive
— Mailboxes configurable while module remains synchronized to CAN bus
Transmit features
— Supports configuration of multiple mailboxes to form message queues of scalable depth
— Arbitration scheme according to message ID or message buffer number
— Internal arbitration to guarantee no inner or outer priority inversion
— Transmit abort procedure and notification
Receive features
— Individual programmable filters for each mailbox
— 8 mailboxes configurable as a 6-entry receive FIFO
— 8 programmable acceptance filters for receive FIFO
Programmable clock source
— System clock
— Direct oscillator clock to avoid PLL jitter
Listen only mode capabilities
CAN Sampler
— Can catch the 1st message sent on the CAN network while the MPC5606S is stopped. This guarantees a clean
startup of the system without missing messages on the CAN network.
— The CAN sampler is connected to one of the CAN RX pins.
1.6.18
Serial communication interface module (LINFlex)
The MPC5606S devices include up to two LINFlex modules and support for LIN Master mode, LIN Slave mode and UART
mode. The modules are LIN state machine compliant to the LIN 1.3 and 2.0 and 2.1 Specifications and handle LIN frame
transmission and reception without CPU intervention.
Other features include:
Autonomous LIN frame handling
Message buffer to store identifier and up to eight data bytes
Supports message length of up to 64 bytes
Detection and flagging of LIN errors
Sync field; Delimiter; ID parity; Bit, Framing; Checksum and Timeout errors
Classic or extended checksum calculation
Configurable Break duration of up to 36-bit times
Programmable Baud rate prescalers (13-bit mantissa, 4-bit fractional)
Diagnostic features
— Loop back
—Self Test
— LIN bus stuck dominant detection
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