參數(shù)資料
型號: MPC5606SVLU6R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176
封裝: 24 X 24 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, MS-026BGA, LQFP-176
文件頁數(shù): 83/136頁
文件大?。?/td> 858K
代理商: MPC5606SVLU6R
MPC5606S
M
icr
ocontr
oller
Data
Sheet,
Re
v
.7
Fre
e
scale
Semico
nductor
50
PK[8] PCR[129] Option 0
Option 1
Option 2
Option 3
GPIO[129]
MDO2
PDI[16]
—SIUL
Nexus
PDI
I/O
M1
None,
None
—42
D11
PK[9] PCR[130] Option 0
Option 1
Option 2
Option 3
GPIO[130]
MDO3
PDI[17]
—SIUL
Nexus
PDI
I/O
M1
None,
None
—44
A10
PK[10] PCR[131] Option 0
Option 1
Option 2
Option 3
GPIO[131]
SDA_1
eMIOSA[15]
—SIUL
I2C_1
PWM/Timer
I/O
S
None,
None
—52
N6
PK[11] PCR[132] Option 0
Option 1
Option 2
Option 3
GPIO[132]
SCL_1
eMIOSA[14]
—SIUL
I2C_1
PWM/Timer
I/O
S
None,
None
—53
N5
PK[12]
Reserved
PK[13]
Reserved
PK[14]
Reserved
PK[15]
Reserved
1 Alternate functions are chosen by setting the values of the PCR[n].PA bitfields inside the SIUL module. PCR[n].PA = 00 -> Option 0; PCR[n].PA = 01
-> Option 1; PCR[n].PA = 10 -> Option 2; PCR[n].PA = 11-> Option 3. This is intended to select the output functions; to use one of the input functions,
the PCR[n].IBE bit must be written to ‘1’, regardless of the values selected in the PCR[n].PA bitfields. For this reason, the value corresponding to an
input only function is reported as “—”.
2 Special functions are enabled independently from the standard digital pin functions. Enabling standard I/O functions in the PCR registers may interfere
with their functionality. ADC functions are enabled using the PCR[APC] bit; other functions are enabled by enabling the respective module.
3 Using the PSMI registers in the System Integration Unit Lite (SIUL), different pads can be multiplexed to the same peripheral input. Please see the
SIUL chapter of the MPC5606S Microcontroller Reference Manual for details.
4 See Table 9.
5 Reset configuration is given as I/O direction and pull, e.g., “Input, Pullup”.
6 This option on this pin has alternate functions that depend on whether the QuadSPI is in SPI mode or in serial flash mode (SFM).
7 Out of reset pins PH[0:3] are available as JTAG pins (TCK, TDI, TDO and TMS respectively). It is up to the user to configure pins PH[0:3] when
needed.
Table 8. Port pin summary (continued)
Port
pin
PCR
register
Alternate
function1
Function
Special
function2
Peripheral3
I/O
direction
Pad
type4
RESET
config.5
Pin number
144 LQFP
176 LQFP
208 MAPBG
A
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