MPC5606S Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
27
2.2
176 LQFP package pinout
Figure 5 shows the pinout for the 176-pin LQFP package.
CAUTION
Any pins labeled “NC” must not be connected to any external circuit.
Figure 5. 176-pin LQFP Pinout
176-Pin
LQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
P
A
9
/GP
IO[9]/DC
U
_G
1/eMIOS
B
18/S
D
A
_2/FP
14
P
A
8
/GP
IO[8]/DC
U
_G
0/eMIOS
B
23/S
C
L_2/FP
15
P
A
7
/GP
IO[7]/DC
U
_R
7/eMIOS
A
16/FP
1
6
P
A
6
/GP
IO[6]/DC
U
_R
6/eMIOS
A
15/FP
1
7
P
A
5
/GP
IO[5]/DC
U
_R
5/eMIOS
A
17/FP
1
8
V
SSE
_
A
VD
DE
_
A
P
A
4
/GP
IO[4]/DC
U
_R
4/eMIOS
A
18/FP
1
9
P
A
3
/GP
IO[3]/DC
U
_R
3/eMIOS
A
19/FP
2
0
P
A
2
/GP
IO[2]/DC
U
_R
2/eMIOS
A
20/FP
2
1
P
A
1
/GP
IO[1]/DC
U
_R
1/eMIOS
A
21/FP
2
P
A
0
/GP
IO[0]/DC
U
_R
0/eMIOS
A
22/S
OUN
D/FP
23
V
SS1
2
VD
D1
2
P
F
15/GP
IO[
85]/S
C
K
_2/FP
24
P
F
14/GP
IO[
84]/S
O
U
T_2/C
A
N
T
X
_1/FP
25
P
F
13/GP
IO[
83]/S
IN
_2/C
A
N
R
X
_1/FP
2
6
P
F
12/GP
IO[
82]/eMIOS
B
16/P
C
S
2_2/FP
27
P
F
1
1/GP
IO[81]/eMI
OS
B
23/P
C
S
1_2/FP
28
P
F
10/GP
IO[
80]/eMIOS
A
16/P
C
S
0_2/FP
29
P
G1
2/GP
IO[98]/eMIO
S
A
23/S
OU
ND/e
M
IOS
A
8/FP
30
V
SSE
_
A
VD
DE
_
A
P
F
9/GP
IO[7
9]/S
C
L_1/P
C
S
0_1/TX
D_1/FP
31
P
F
8/GP
IO[7
8]/S
D
A
_
1/P
C
S
1
_1/RX
D_1/FP
32
P
F
7/GP
IO[7
7]/S
C
L_0/P
C
S
2_1/FP
33
P
F
6/GP
IO[7
6]/S
D
A
_
0
/F
P
3
4
V
SS1
2
VD
D1
2
P
F
5/GP
IO[7
5]/eMIOS
A
9
/DCU
_T
A
G/FP
3
5
P
F
4/GP
IO[7
4]/eMIOS
A
1
0/P
D
I7/FP
36
P
F
3/GP
IO[7
3]/eMIOS
A
1
1/P
D
I6/
F
P
37
P
F
1/GP
IO[7
1]/eMIOS
A
1
2/P
D
I5/eMIOS
A
21/FP
38
P
F
0/GP
IO[7
0]/eMIOS
A
1
3/P
D
I4/eMIOS
A
22/FP
39
P
K
1/GP
IO[122
]/P
D
I13/eMIOS
A
17
P
K
0/GP
IO[121
]/P
D
I12/eMIOS
A
18/DC
U_T
A
G
P
B
2/GP
IO[18]/
T
X
D
_
0
P
B
3/GP
IO[19]/
R
X
D
_0
P
J
1
5
/GP
IO[120]/P
DI1
1
/eMIO
S
A
1
9
P
J
1
4/GP
IO[1
19]/P
DI10/eMIO
S
A
20
P
J
1
3
/GP
IO[1
18]/P
DI9/eMIO
S
B
20
P
J
1
2
/GP
IO[1
17]/P
DI8/eMIO
S
B
17
V
SSE
_
E
VD
DE
_
E
NMI
/GP
IO[72]/P
F2
VD
DE
_
B
VSS
E_
B
P
C
S
2_0/eMIOS
B
19/RX
D_
1/GP
IO[28]/P
B
1
2
P
C
S
1_0/
eMIOS
B
18/TX
D_
1/GP
IO[29]/P
B
13
VD
D1
2
VSS1
2
eMIOS
A
15
/S
D
A
_1
/GP
IO[131]/P
K
10
eMIOS
A
14
/S
C
L_1/GP
IO[132]
/P
K
1
eMIOS
B
20/S
C
K
_0/GP
IO[25]/P
B
9
eMIO
S
B
21/S
O
U
T
_0/GP
IO[24]/P
B
8
eM
IOS
B
22/S
IN
_0/GP
IO[23]/P
B
7
CA
N
R
X
_0/P
D
I0/GP
IO[10
9
]/P
J
4
CA
N
T
X
_0/P
D
I1/G
P
IO
[1
1
0]/P
J
5
eMIOS
A
22/CA
NR
X
_
1
/P
D
I2/GP
IO[1
1
]/P
J
6
eMIOS
A
21/CA
N
T
X
_1/P
D
I3/G
P
IO
[1
1
2]/P
J
7
C
LK
O
UT/eMIOS
B
16/P
C
S
0_0/GP
IO[103]/P
H
4
MA
0/S
C
K
_1/GP
IO[20]/P
B
4
F
A
B
M
/M
A
1/S
OU
T_1/GP
IO[21]/P
B
5
VD
DE
_
B
VSS
E_
B
A
B
S
[0]
/MA
2/S
IN
_1/GP
IO[22]/P
B
6
VD
D1
2
VSS1
2
VDD
A
VS
SA
X
T
A
L32/A
N
S
15/GP
IO[45]/P
C
15
E
X
T
A
L32/A
N
S
14/GP
IO[44]/P
C
14
P
C
S
0_1/MA
2/A
N
S
13/GP
IO[43]/P
C
13
P
C
S
1_1/MA
1/A
N
S
12/GP
IO[42]/P
C
12
P
C
S
2_1/MA
0/A
N
S
1
1/G
P
IO
[41]/P
C
1
S
O
UND
/A
NS
10(mux)/GP
IO[40]/P
C
1
0
A
N
S
9
/GP
IO[39]/P
C
9
A
N
S
8
/GP
IO[38]/P
C
8
V
DDE
_C
VSS
E_
C
A
N
S
7
/GP
IO[37]/P
C
7
A
N
S
6
/GP
IO[36]/P
C
6
A
N
S
5
/GP
IO[35]/P
C
5
A
N
S
4
/GP
IO[34]/P
C
4
A
N
S
3
/GP
IO[33]/P
C
3
A
N
S
2
/GP
IO[32]/P
C
2
A
N
S
1
/GP
IO[31]/P
C
1
A
N
S
0
/GP
IO[30]/P
C
0
PB11/GPIO[27]/CANTX_1/PDI3/eMIOSA16
PB10/GPIO[26]/CANRX_1/PDI2/eMIOSA23
PB0/GPIO[16]/CANTX_0/PDI1
PB1/GPIO[17]/CANRX_0/PDI0
PJ11/GPIO[116]/PDI7
PJ10/GPIO[115]/PDI6
PJ9/GPIO[114]/PDI5
PJ8/GPIO[113]/PDI4
VSS12
VDD12
PJ3/GPIO[108]/PDI_PCLK
PJ2/GPIO[107]/PDI_VSYNC
PJ1/GPIO[106]/PDI_HSYNC
PJ0/GPIO[105]/PDI_DE
PE7/GPIO[69]/M5C1P/SSD5_3/eMIOSA8
PE6/GPIO[68]/M5C1M/SSD5_2/eMIOSA9
PE5/GPIO[67]/M5C0P/SSD5_1/eMIOSA10
PE4/GPIO[66]/M5C0M/SSD5_0/eMIOSA11
VSSMC
VDDMC
PE3/GPIO[65]/M4C1P/SSD4_3/eMIOSA12
PE2/GPIO[64]/M4C1M/SSD4_2/eMIOSA13
PE1/GPIO[63]/M4C0P/SSD4_1/eMIOSA14
PE0/GPIO[62]/M4C0M/SSD4_0/eMIOSA15
PD15/GPIO[61]/M3C1P/SSD3_3
PD14/GPIO[60]/M3C1M/SSD3_2
PD13/GPIO[59]/M3C0P/SSD3_1
PD12/GPIO[58]/M3C0M/SSD3_0
VSSMB
VDDMB
PD11/GPIO[57]/M2C1P/SSD2_3
PD10/GPIO[56]/M2C1M/SSD2_2
PD9/GPIO[55]/M2C0P/SSD2_1
PD8/GPIO[54]/M2C0M/SSD2_0
PD7/GPIO[53]/M1C1P/SSD1_3/eMIOSB16
PD6/GPIO[52]/M1C1M/SSD1_2/eMIOSB17
PD5/GPIO[51]/M1C0P/SSD1_1/eMIOSB18
PD4/GPIO[50]/M1C0M/SSD1_0/eMIOSB19
VSSMA
VDDMA
PD3/GPIO[49]/M0C1P/SSD0_3/eMIOSB20
PD2/GPIO[48]/M0C1M/SSD0_2/eMIOSB21
PD1/GPIO[47]/M0C0P/SSD0_1/eMIOSB22
PD0/GPIO[46]/M0C0M/SSD0_0/eMIOSB23
(see detail inset) PA10
(see detail inset) PA11
(see detail inset) PA12
(see detail inset) PA13
(see detail inset) PA14
(see detail inset) PA15
VDDE_A
VSSE_A
(see detail inset) PG0
(see detail inset) PG1
(see detail inset) PG2
(see detail inset) PG3
(see detail inset) PG4
(see detail inset) PG5
FP1/DCU_B6/GPIO[92]/PG6
FP0/DCU_B7/GPIO[93]/PG7
(see detail inset) PG8
(see detail inset) PG9
BP2/DCU_DE/GPIO[96]/PG10
(see detail inset) PG11
VLCD/GPIO[104]/PH5
VDDR
VSSR
RESET
VRC_CTRL
VPP
XTAL
VSSOSC
EXTAL
VSSPLL
VDDPLL
VREG_BYPASS
PDI10/MCKO/GPIO[123]/PK2
PDI11/MSEO/GPIO[124]/PK3
PDI12/EVTO/GPIO[125]/PK4
TDI/GPIO[100]/PH1
PDI13/EVTI/GPIO[126]/PK5
PDI14/MDO0/GPIO[127]/PK6
TDO/GPIO[101]/PH2
PDI15/MDO1/GPIO[128]/PK7
TMS/GPIO[102]/PH3
PDI16/MDO2/GPIO[129]/PK8
TCK/GPIO[99]/PH0
PDI17/MDO3/GPIO[130]/PK9
Detail:
FP13/eMIOSB20/DCU_G2/GPIO[10]/PA10 –
FP12/eMIOSA13/DCU_G3/GPIO[11]/PA11 –
FP11/eMIOSA12/DCU_G4/GPIO[12]/PA12 –
FP10/eMIOSA11/DCU_G5/GPIO[13]/PA13 –
FP9/eMIOSA10/DCU_G6/GPIO[14]/PA14 –
FP8/eMIOSA9/DCU_G7/GPIO[15]/PA15 –
FP7/SOUND/SCL_3/DCU_B0/GPIO[86]/PG0 –
FP6/SDA_3/DCU_B1/GPIO[87]/PG1 –
FP5/eMIOSB19/DCU_B2/GPIO[88]/PG2 –
FP4/eMIOSB21/DCU_B3/GPIO[89]/PG3 –
FP3/eMIOSB17/DCU_B4/GPIO[90]/PG4 –
FP2/eMIOSA8/DCU_B5/GPIO[91]/PG5 –
BP0/DCU_VSYNC/GPIO[94]/PG8 –
BP1/DCU_HSYNC/GPIO[95]/PG9 –
BP3/DCU_PCLK/GPIO[97]/PG11 –