21
ATmega16M1/32M1/64M1 [DATASHEET]
8209E–AVR–11/2012
7.7
Register description
7.7.1
EEARH and EEARL – The EEPROM Address Registers
Bits 15:10 – Res: Reserved
These bits are reserved and will always read as zero.
Bits 9:0 – EEAR[8:0]: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 512B/1K/2Kbytes
EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 1023. The initial value of EEAR
is undefined. A proper value must be written before the EEPROM may be accessed.
7.7.2
EEDR – The EEPROM Data Register
Bits 7:0 – EEDR[7:0]: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the EEPROM in the
address given by the EEAR Register. For the EEPROM read operation, the EEDR contains the data read out from
the EEPROM at the address given by EEAR.
7.7.3
EECR – The EEPROM Control Register
Bits 7:6 – Reserved Bits
These bits are reserved and will always read as zero.
Bits 5:4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be triggered when writing
EEWE. It is possible to program data in one atomic operation (erase the old value and program the new value) or
to split the Erase and Write operations in two different operations. The Programming times for the different modes
are shown in
Table 7-1 on page 22. While EEWE is set, any write to EEPMn will be ignored. During reset, the
EEPMn bits will be reset to 0b00 unless the EEPROM is busy programming.
Bit
15
141312
11
10
9
8
–
-
EEAR9
EEAR8
EEARH
EEAR7
EEAR6
EEAR5
EEAR4
EEAR3
EEAR2
EEAR1
EEAR0
EEARL
76
5
4
3
2
1
0
Read/write
R
R/W
Initial value
0
X
XX
X
Bit
765
432
10
EEDR7
EEDR6
EEDR5
EEDR4
EEDR3
EEDR2
EEDR1
EEDR0
EEDR
Read/write
R/W
Initial value
000
00
Bit
7654
3
2
10
–
EEPM1
EEPM0
EERIE
EEMWE
EEWE
EERE
EECR
Read/Write
R
R/W
Initial Value
0
X
0
X
0