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ATmega16M1/32M1/64M1 [DATASHEET]
8209E–AVR–11/2012
21.10.5.1
ADLAR = 0
21.10.5.2
ADLAR = 1
21.10.6
DIDR0 – Digital Input Disable Register 0
Bit 7:0 – ADC7D..ADC0D, ACMPN0D, ACMPN1D, ACMPN2D, ACMPN3D, ACMP2D, AMP2ND:
ADC7:0, ACMPN0, ACMPN1, ACMPN2, ACMPN3, ACMP2, AMP2N Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the
ADC7:0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power
consumption in the digital input buffer.
21.10.7
DIDR1 – Digital Input Disable Register 1
Bit 6:0 – ADC10D..8D, ACMP0D, ACMP1D, ACMP3D, AMP0PD, AMP0ND, AMP1PD, AMP1ND, AMP2PD:
ADC10..8, ACMP0, ACMP1, ACMP3, AMP0P, AMP0N, AMP1P, AMP1N, AMP2P Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to an
analog pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power con-
sumption in the digital input buffer.
21.10.8
AMP0CSR – Amplifier 0 Control and Status register
Bit
7
654
3
2
1
0
-
ADC9
ADC8
ADCH
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
ADCL
Read/write
R
RR
Initial value
0
000
0
Bit
7
654
3
2
1
0
ADC9
ADC8
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADCH
ADC1
ADC0
-
ADCL
Read/write
R
RR
Initial value
0
000
0
Bit
76543210
ADC7D
ADC6D
ACMPN1D
AMP2ND
ADC5D
ACMPN0D
ADC4D
ADC3D
ACMPN2D
ADC2D
ACMP2D
ADC1D
ADC0D
ACMPN3D
DIDR0
Read/Write
R/W
Initial Value
00000000
Bit
76543210
-
AMP2PD
ACMP0D
AMP0PD
AMP0ND
ADC10D
ACMP1D
ADC9D
AMP1PD
ACMP3D
ADC8D
AMP1ND
DIDR1
Read/write
-
R/W
Initial value
00000000
Bit
7
654
3
2
1
0
AMP0EN
AMP0IS
AMP0G1
AMP0G0
AMPCMP0
AMP0TS2
AMP0TS1
AMP0TS0
AMP0CSR
Read/write
R/W
Initial value
0