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ATmega16M1/32M1/64M1 [DATASHEET]
8209E–AVR–11/2012
17.16.3
POCRnSAH and POCRnSAL – PSC Output Compare SA Register
17.16.4
POCRnRAH and POCRnRAL – PSC Output Compare RA Register
17.16.5
POCRnSBH and POCRnSBL – PSCOutput Compare SB Register
17.16.6
POCRnRBH and POCRnRBL – PSC Output Compare RB Register
Note: n = 0 to 2 according to module number.
The Output Compare Registers RA, RB, SA and SB contain a 12-bit value that is continuously compared with the
PSC counter value. A match can be used to generate an Output Compare interrupt, or to generate a waveform out-
put on the associated pin.
The Output Compare Registers are 16-bit and 12-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using an 8-bit temporary high byte
register (TEMP). This temporary register is shared by all the other 16-bit registers.
17.16.7
PCNF – PSC Configuration Register
Table 17-9.
Synchronization source description in Centered mode.
PSYNCn1
PSYNCn0
Description
00
Send signal on match with OCRnRA (during counting down of PSC). The
min value of OCRnRA must be 1
01
Send signal on match with OCRnRA (during counting up of PSC). The
min value of OCRnRA must be 1
1
0
no synchronization signal
1
no synchronization signal
Bit
76543210
––––
POCRnSA[11:8]
POCRnSAH
POCRnSA[7:0]
POCRnSAL
Read/write
R/W
Initial value
00000000
Bit
76543210
––––
POCRnRA[11:8]
POCRnRAH
POCRnRA[7:0]
POCRnRAL
Read/write
R/W
Initial value
00000000
Bit
76543210
––––
POCRnSB[11:8]
POCRnSBH
POCRnSB[7:0]
POCRnSBL
Read/write
R/W
Initial value
00000000
Bit
76543210
––––
POCRnRB[11:8]
POCRnRBH
POCRnRB[7:0]
POCRnRBL
Read/write
R/W
Initial value
00000000
Bit
7
654
3
2
1
0
-
PULOCK
PMODE
POPB
POPA
-
-
PCNF
Read/write
R
R/W
R
Initial value
0