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參數(shù)資料
| 型號： | P60ARM-GP1N |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Low power, general purpose 32-bit RISC microprocessor |
| 中文描述： | 低功耗，通用32位RISC微處理器 |
| 文件頁數(shù)： | 29/120頁 |
| 文件大小： | 1275K |
| 代理商： | P60ARM-GP1N |
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Instruction Set - Shifts
25
4.4.2 Shifts
When the second operand is specified to be a shifted register, the operation of the barrel shifter is controlled
by the Shift field in the instruction. This field indicates the type of shift to be performed (logical left or right,
arithmetic right or rotate right). The amount by which the register should be shifted may be contained in
an immediate field in the instruction, or in the bottom byte of another register (other than R15). The
encoding for the different shift types is shown in
Figure 9: ARM Shift Operations
.
Figure 9: ARM Shift Operations
Instruction specified shift amount
When the shift amount is specified in the instruction, it is contained in a 5 bit field which may take any value
from 0 to 31. A logical shift left (LSL) takes the contents of Rm and moves each bit by the specified amount
to a more significant position. The least significant bits of the result are filled with zeros, and the high bits
of Rm which do not map into the result are discarded, except that the least significant discarded bit becomes
the shifter carry output which may be latched into the C bit of the CPSR when the ALU operation is in the
logical class (see above). For example, the effect of LSL #5 is shown in
Figure 10: Logical Shift Left
.
Figure 10: Logical Shift Left
Note that LSL #0 is a special case, where the shifter carry out is the old value of the CPSR C flag. The
contents of Rm are used directly as the second operand.
A logical shift right (LSR) is similar, but the contents of Rm are moved to less significant positions in the
result. LSR #5 has the effect shown in
Figure 11: Logical Shift Right
.
0
0
1
Rs
11
8
7
6
5
4
11
7 6
5
4
Shift type
00 = logical left
01 = logical right
10 = arithmetic right
11 = rotate right
Shift amount
5 bit unsigned integer
Shift type
00 = logical left
01 = logical right
10 = arithmetic right
11 = rotate right
Shift register
Shift amount specified in
bottom byte of Rs
0 0 0 0 0
contents of Rm
value of operand 2
31
27 26
0
carry out
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P60ARM-IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Low power, general purpose 32-bit RISC microprocessor |
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